On 2024-11-04 5:41 pm, Jason Gunthorpe wrote:
A minority of page table implementations (arm_lpae, armv7) are unique in
how they handle partial unmap of large IOPTEs.
Other implementations will unmap the large IOPTE and return it's
length. For example if a 2M IOPTE is present and the first 4K is
On 21/10/2024 1:17 pm, Jason Gunthorpe wrote:
On Mon, Oct 21, 2024 at 12:32:21PM +0100, Steven Price wrote:
that, we can always do it in two steps (unmap the 2M region and remap
the borders). At some point it'd be good to have some kind of atomic
page table updates, so we don't have this short
On 2024-09-20 9:20 am, Andy Yan wrote:
From: Andy Yan
The vop mmu support translate physical address upper 4 GB to iova
below 4 GB. So set dma mask to 64 bit to indicate we support address
4GB.
This can avoid warnging message like this on some boards with DDR
4 GB:
rockchip-drm display-su
On 2024-10-16 2:50 pm, Erik Faye-Lund wrote:
On Wed, 2024-10-16 at 15:16 +0200, Erik Faye-Lund wrote:
On Thu, 2024-02-29 at 17:22 +0100, Boris Brezillon wrote:
+/**
+ * enum drm_panthor_sync_op_flags - Synchronization operation
flags.
+ */
+enum drm_panthor_sync_op_flags {
+ /** @DRM_PANT
t thinking ahead, might it be worth a logical "are SG segment limits
relevant?" wrapper around the dev->dma_parms reference? Not a big deal
for now if we think this site is the only user, so either way,
Reviewed-by: Robin Murphy
Signed-off-by: Christoph Hellwig
---
drive
On 23/05/2024 6:52 pm, Rob Clark wrote:
From: Rob Clark
Add an io-pgtable method to walk the pgtable returning the raw PTEs that
would be traversed for a given iova access.
Have to say I'm a little torn here - with my iommu-dma hat on I'm not
super enthusiastic about adding any more overhead
On 2024-06-13 10:38 pm, Sebastian Reichel wrote:
Hi,
On Thu, Jun 13, 2024 at 11:34:02AM GMT, Tomeu Vizoso wrote:
On Thu, Jun 13, 2024 at 11:24 AM Tomeu Vizoso wrote:
On Thu, Jun 13, 2024 at 2:05 AM Sebastian Reichel
wrote:
On Wed, Jun 12, 2024 at 03:52:55PM GMT, Tomeu Vizoso wrote:
IOMMUs
On 29/05/2024 6:32 am, Lu Baolu wrote:
The IOMMU subsystem has undergone some changes, including the removal
of iommu_ops from the bus structure. Consequently, the existing domain
allocation interface, which relies on a bus type argument, is no longer
relevant:
struct iommu_domain *iommu_do
On 11/04/2024 4:04 pm, Thorsten Blum wrote:
Use `find . -type f -exec sed -i 's/\/the/g' {} +` to find all
occurrences of "the the" and replace them with a single "the".
[...]
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index d60b09a5acfc..a75da9a01f91 100644
---
On 18/03/2024 2:51 pm, Steven Price wrote:
virt_to_pfn() isn't available on x86 (except to xen) so breaks
COMPILE_TEST builds. Avoid its use completely by instead storing the
struct page pointer allocated in panthor_device_init() and using
page_to_pfn() instead.
Signed-off-by: Steven Price
---
On 18/03/2024 1:49 pm, Steven Price wrote:
On 18/03/2024 13:08, Boris Brezillon wrote:
On Mon, 18 Mar 2024 11:31:05 +
Steven Price wrote:
On 18/03/2024 08:58, Boris Brezillon wrote:
Putting a hard dependency on CONFIG_PM is not possible because of a
circular dependency issue, and it's ac
On 18/03/2024 8:58 am, Boris Brezillon wrote:
Putting a hard dependency on CONFIG_PM is not possible because of a
circular dependency issue, and it's actually not desirable either. In
order to support this use case, we forcibly resume at init time, and
suspend at unplug time.
Reported-by: kernel
On 2024-03-11 1:22 pm, Boris Brezillon wrote:
On Mon, 11 Mar 2024 13:11:28 +
Robin Murphy wrote:
On 2024-03-11 11:52 am, Boris Brezillon wrote:
On Mon, 11 Mar 2024 13:49:56 +0200
Jani Nikula wrote:
On Mon, 11 Mar 2024, Boris Brezillon wrote:
On Mon, 11 Mar 2024 13:05:01 +0200
On 2024-03-11 11:52 am, Boris Brezillon wrote:
On Mon, 11 Mar 2024 13:49:56 +0200
Jani Nikula wrote:
On Mon, 11 Mar 2024, Boris Brezillon wrote:
On Mon, 11 Mar 2024 13:05:01 +0200
Jani Nikula wrote:
This breaks the config for me:
SYNCinclude/config/auto.conf.cmd
GEN Makef
On 29/11/2023 12:48 am, Jason Gunthorpe wrote:
The arm-smmu driver can COMPILE_TEST on x86, so expand this to also
enable the IORT code so it can be COMPILE_TEST'd too.
Signed-off-by: Jason Gunthorpe
---
drivers/acpi/Kconfig| 2 --
drivers/acpi/Makefile | 2 +-
drivers/acpi/ar
On 29/11/2023 12:48 am, Jason Gunthorpe wrote:
The iommu_device_lock protects the iommu_device_list which is only read by
iommu_ops_from_fwnode().
This is now always called under the iommu_probe_device_lock, so we don't
need to double lock the linked list. Use the iommu_probe_device_lock on
the
decisively seems more useful than deferring forever.
Signed-off-by: Robin Murphy
---
I realised that last time I sent this I probably should have CCed a
wider audience of reviewers, so here's one with an updated commit
message as well to make the resend more worthwhile.
drivers/gpu/drm/med
On 13/11/2023 6:37 am, Yong Wu (吴勇) wrote:
[...]
+properties:
+ compatible:
+const: secure_cma_region
Still wrong compatible. Look at other bindings - there is nowhere
underscore. Look at other reserved memory bindings especially.
Also, CMA is a Linux thingy, so either not suitable for bi
On 29/09/2023 4:45 pm, Will Deacon wrote:
On Mon, Sep 25, 2023 at 06:54:42PM +0100, Robin Murphy wrote:
On 2023-04-10 19:52, Dmitry Baryshkov wrote:
If the Adreno SMMU is dma-coherent, allocation will fail unless we
disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the
On 2023-04-10 19:52, Dmitry Baryshkov wrote:
If the Adreno SMMU is dma-coherent, allocation will fail unless we
disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the
coherent SMMUs (like we have on sm8350 platform).
Hmm, but is it right that it should fail in the first place?
On 12/09/2023 4:53 pm, Rob Herring wrote:
On Tue, Sep 12, 2023 at 11:13:50AM +0100, Robin Murphy wrote:
On 12/09/2023 9:28 am, Krzysztof Kozlowski wrote:
On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
Hi Rob,
Thanks for your review.
On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote
On 12/09/2023 9:28 am, Krzysztof Kozlowski wrote:
On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
Hi Rob,
Thanks for your review.
On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote:
External email : Please do not click links or open attachments until
you have verified the sender or the co
On 2023-09-04 17:16, Boris Brezillon wrote:
On Mon, 4 Sep 2023 16:22:19 +0100
Steven Price wrote:
On 04/09/2023 10:26, Boris Brezillon wrote:
On Mon, 4 Sep 2023 08:42:08 +0100
Steven Price wrote:
On 01/09/2023 17:10, Boris Brezillon wrote:
On Wed, 9 Aug 2023 18:53:15 +0200
Boris Brezi
On 2023-08-09 17:53, Boris Brezillon wrote:
[...]
+/**
+ * struct drm_panthor_vm_create - Arguments passed to
DRM_PANTHOR_IOCTL_VM_CREATE
+ */
+struct drm_panthor_vm_create {
+ /** @flags: VM flags, MBZ. */
+ __u32 flags;
+
+ /** @id: Returned VM ID. */
+ __u32 id;
+
+
On 2023-08-14 12:18, Steven Price wrote:
On 11/08/2023 20:26, Robin Murphy wrote:
On 2023-08-11 17:56, Daniel Stone wrote:
Hi,
On 11/08/2023 17:35, Robin Murphy wrote:
On 2023-08-09 17:53, Boris Brezillon wrote:
+obj-$(CONFIG_DRM_PANTHOR) += panthor.o
FWIW I still think it would be nice
On 2023-08-14 11:54, Steven Price wrote:
[...]
+/**
+ * panthor_gpu_l2_power_on() - Power-on the L2-cache
+ * @ptdev: Device.
+ *
+ * Return: 0 on success, a negative error code otherwise.
+ */
+int panthor_gpu_l2_power_on(struct panthor_device *ptdev)
+{
+ u64 core_mask = U64_MAX;
+
+
On 2023-08-18 22:32, Jason Gunthorpe wrote:
It turns out several drivers are calling of_dma_configure() outside the
expected bus_type.dma_configure op. This ends up being mis-locked and
triggers a lockdep assertion, or instance:
iommu_probe_device_locked+0xd4/0xe4
of_iommu_configure+0x10c/
On 2023-07-13 20:13, Andrew Davis wrote:
This new export type exposes to userspace the SRAM area as a DMA-BUF Heap,
this allows for allocations of DMA-BUFs that can be consumed by various
DMA-BUF supporting devices.
Signed-off-by: Andrew Davis
---
Changes from v2:
- Make sram_dma_heap_alloca
On 2023-08-11 17:56, Daniel Stone wrote:
Hi,
On 11/08/2023 17:35, Robin Murphy wrote:
On 2023-08-09 17:53, Boris Brezillon wrote:
+obj-$(CONFIG_DRM_PANTHOR) += panthor.o
FWIW I still think it would be nice to have a minor
directory/Kconfig/Makefile reshuffle and a trivial bit of extra
On 2023-08-09 17:53, Boris Brezillon wrote:
Now that all blocks are available, we can add/update Kconfig/Makefile
files to allow compilation.
v2:
- Rename the driver (pancsf -> panthor)
- Change the license (GPL2 -> MIT + GPL2)
- Split the driver addition commit
- Add new dependencies on GPUVA a
On 2023-06-20 10:47, Sui Jingfeng wrote:
From: Sui Jingfeng
Loongson CPUs maintain cache coherency by hardware, which means that the
data in the CPU cache is identical to the data in main system memory. As
for the peripheral device, most of Loongson chips chose to define the
peripherals as DMA
On 2023-05-17 15:52, Alexandre Bailon wrote:
Some APU devices are behind an IOMMU.
For some of these devices, we can't use DMA API because
they use static addresses so we have to manually use
IOMMU API to correctly map the buffers.
Except you still need to use the DMA for the sake of cache cohe
Remove the pointless check. If an IOMMU is providing transparent DMA API
ops for any device(s) we care about, the DT code will have enforced the
appropriate probe ordering already.
Signed-off-by: Robin Murphy
---
v2: Rebase to 6.4-rc1
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4
1 file
On 2023-05-05 15:50, Jason Gunthorpe wrote:
On Tue, Aug 16, 2022 at 06:28:03PM +0100, Robin Murphy wrote:
Although iommu-dma is a per-architecture chonce, that is currently
implemented in a rather haphazard way. Selecting from the arch Kconfig
was the original logical approach, but is
On 2023-04-28 10:27, Thomas Zimmermann wrote:
Implement framebuffer I/O helpers, such as fb_read*() and fb_write*()
with Linux' regular I/O functions. Remove all ifdef cases for the
various architectures.
Most of the supported architectures use __raw_() I/O functions or treat
framebuffer memory
On 2023-01-18 18:00, Jason Gunthorpe wrote:
Change the sg_alloc_table_from_pages() allocation that was hardwired to
GFP_KERNEL to use the gfp parameter like the other allocations in this
function.
Auditing says this is never called from an atomic context, so it is safe
as is, but reads wrong.
On 2023-01-18 11:09, Steven Price wrote:
On 17/01/2023 16:44, Arnd Bergmann wrote:
From: Arnd Bergmann
On ARMv5 and earlier, a randconfig build can still run into
WARNING: unmet direct dependencies detected for IOMMU_IO_PGTABLE_LPAE
Depends on [n]: IOMMU_SUPPORT [=y] && (ARM [=y] || ARM64
On 2023-01-06 16:42, Jason Gunthorpe wrote:
The internal mechanisms support this, but instead of exposting the gfp to
the caller it wrappers it into iommu_map() and iommu_map_atomic()
Fix this instead of adding more variants for GFP_KERNEL_ACCOUNT.
FWIW, since we *do* have two variants already
On 03/01/2023 4:15 pm, Maxime Ripard wrote:
Hi Robin,
On Tue, Jan 03, 2023 at 01:01:07PM +, Robin Murphy wrote:
Hi Sean,
On 22/12/2022 11:37 pm, Sean Anderson wrote:
Convert users of component_match_add_release with component_release_of
and component_compare_of to component_match_add_of
Hi Sean,
On 22/12/2022 11:37 pm, Sean Anderson wrote:
Convert users of component_match_add_release with component_release_of
and component_compare_of to component_match_add_of.
Signed-off-by: Sean Anderson
Acked-by: Mark Brown
---
Changes in v2:
- Split off from helper addition
drivers/io
On 2022-12-16 17:08, Sean Anderson wrote:
On 11/3/22 14:22, Sean Anderson wrote:
This series adds a new function component_match_add_of to simplify the
common case of calling component_match_add_release with
component_release_of and component_compare_of. There is already
drm_of_component_match_a
Robin Murphy:
On 2022-12-14 22:02, Alex Deucher wrote:
On Wed, Dec 14, 2022 at 4:54 PM Robin Murphy
wrote:
On 2022-12-12 02:08, Luben Tuikov wrote:
Fix screen corruption on older 32-bit systems using AGP chips.
On older systems with little memory, for instance 1.5 GiB, using an
AGP chip,
the
On 2022-12-14 22:02, Alex Deucher wrote:
On Wed, Dec 14, 2022 at 4:54 PM Robin Murphy wrote:
On 2022-12-12 02:08, Luben Tuikov wrote:
Fix screen corruption on older 32-bit systems using AGP chips.
On older systems with little memory, for instance 1.5 GiB, using an AGP chip,
the device'
nks,
Robin.
Partially reverts commit 33b3ad3788aba846fc8b9a065fe2685a0b64f713.
v2: Amend the commit description.
Cc: Mikhail Krylov
Cc: Alex Deucher
Cc: Robin Murphy
Cc: Direct Rendering Infrastructure - Development
Cc: AMD Graphics
Fixes: 33b3ad3788aba8 ("drm/radeon: handle PCI
On 2022-12-07 15:29, Liviu Dudau wrote:
On Wed, Dec 07, 2022 at 01:59:04PM +, Robin Murphy wrote:
On 2022-12-07 09:21, Jiasheng Jiang wrote:
As kzalloc may fail and return NULL pointer, it should be better to check
the return value in order to avoid the NULL pointer dereference in
On 2022-12-07 09:21, Jiasheng Jiang wrote:
As kzalloc may fail and return NULL pointer, it should be better to check
the return value in order to avoid the NULL pointer dereference in
__drm_atomic_helper_connector_reset.
This commit message is nonsense; if
__drm_atomic_helper_connector_reset()
On 2022-11-30 19:59, Mikhail Krylov wrote:
On Wed, Nov 30, 2022 at 11:07:32AM -0500, Alex Deucher wrote:
On Wed, Nov 30, 2022 at 10:42 AM Robin Murphy wrote:
On 2022-11-30 14:28, Alex Deucher wrote:
On Wed, Nov 30, 2022 at 7:54 AM Robin Murphy wrote:
On 2022-11-29 17:11, Mikhail Krylov
On 2022-11-30 14:28, Alex Deucher wrote:
On Wed, Nov 30, 2022 at 7:54 AM Robin Murphy wrote:
On 2022-11-29 17:11, Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 09:44:19AM
On 2022-11-29 17:11, Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote:
On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
On Mon, Nov 2
On 2022-11-24 17:24, Daniel Vetter wrote:
On Thu, Nov 24, 2022 at 11:11:21AM +, Robin Murphy wrote:
On 2022-11-23 17:28, Daniel Vetter wrote:
This code was added in b65e64f7ccd4 ("drm/cma: Use
dma_mmap_writecombine() to mmap buffer"), but does not explain why
it's needed
On 2022-11-23 17:28, Daniel Vetter wrote:
This code was added in b65e64f7ccd4 ("drm/cma: Use
dma_mmap_writecombine() to mmap buffer"), but does not explain why
it's needed.
It should be entirely unnecessary, because remap_pfn_range(), which is
what the various dma_mmap functiosn are built on top
nko
Signed-off-by: Robin Murphy
---
The previous diff turned out to be not quite right, so I've not
included Dmitry's Tested-by given for that.
---
drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/p
On 2022-11-04 20:48, Dmitry Osipenko wrote:
On 11/4/22 23:37, Robin Murphy wrote:
On 2022-11-04 20:11, Dmitry Osipenko wrote:
On 8/23/22 01:01, Robin Murphy wrote:
Convert to io-pgtable's bulk {map,unmap}_pages() APIs, to help the old
single-page interfaces eventually go away. Unmapping
On 2022-11-04 20:11, Dmitry Osipenko wrote:
On 8/23/22 01:01, Robin Murphy wrote:
Convert to io-pgtable's bulk {map,unmap}_pages() APIs, to help the old
single-page interfaces eventually go away. Unmapping heap BOs still
wants to be done a page at a time, but everything else can get the
etup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.
Reported-by: Jon Hunter
Suggested-by: Dmitry Osipenko
Signed-off-by: Robin Murphy
---
v2: Cover DRM instance too, move
On 2022-10-20 13:25, Jon Hunter wrote:
Hi Robin,
On 19/10/2022 18:23, Robin Murphy wrote:
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it
etup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.
Reported-by: Jon Hunter
Suggested-by: Dmitry Osipenko
Signed-off-by: Robin Murphy
---
drivers/gpu/host1x/dev.c | 4
1 f
, but it doesn't work for me, so let's add
4k@30 as a first step.
Sascha
Changes since v1:
- Allow non standard clock rates only on Synopsys phy as suggested by
Ro
On 25/08/2022 12:40 pm, Sascha Hauer wrote:
On Wed, Aug 24, 2022 at 05:07:50PM +0100, Robin Murphy wrote:
On 2022-08-22 16:20, Sascha Hauer wrote:
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a
On 2022-09-21 09:48, Steven Price wrote:
On 20/09/2022 23:13, Alyssa Rosenzweig wrote:
Tentative r-b, but we *do* need to make a decision on how we want to
handle endianness. I don't have strong feelings but the results of that
discussion should go in the commit message.
Linux currently treats
On 2022-09-19 23:24, Sean Anderson wrote:
Hi all,
I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
data is read in i2c_imx_dma_read except for the last two bytes (which
are not read using DMA). This is perhaps best illustrated with the
following example:
# hexdump -C /sy
On 2022-09-15 17:53, Hugh Cole-Baker wrote:
On 15 Sep 2022, at 15:40, Robin Murphy wrote:
On 2021-10-19 22:58, Hugh Cole-Baker wrote:
Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.
Signed-off-by: Hugh Cole-Baker
---
Changes from v1: no changes in this
On 2021-10-19 22:58, Hugh Cole-Baker wrote:
Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.
Signed-off-by: Hugh Cole-Baker
---
Changes from v1: no changes in this patch
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 de
On 2022-09-07 16:23, Jason Gunthorpe wrote:
On Wed, Sep 07, 2022 at 07:29:58AM -0700, Christoph Hellwig wrote:
On Wed, Sep 07, 2022 at 09:33:11AM -0300, Jason Gunthorpe wrote:
Yes, you said that, and I said that when the AMD driver first merged
it - but it went in anyhow and now people are usin
On 2022-09-07 13:33, Jason Gunthorpe wrote:
On Wed, Sep 07, 2022 at 05:05:57AM -0700, Christoph Hellwig wrote:
On Tue, Sep 06, 2022 at 08:48:28AM -0300, Jason Gunthorpe wrote:
Right, this whole thing is the "standard" that dmabuf has adopted
instead of the struct pages. Once the AMD GPU driver
On 2022-09-07 12:34, Jilin Yuan wrote:
Delete the redundant word 'and'.
Delete the redundant word 'in'.
Delete the redundant word 'the'.
Delete the redundant word 'are'.
Signed-off-by: Jilin Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
1 file changed, 3 insertions(+), 3 de
On 2022-09-07 12:26, Jilin Yuan wrote:
Delete the redundant word 'we'.
FWIW, to me it's not redundant because while indeed it is not correct,
it looks exactly like the kind of typo I might make of "if we", and
parsing it as *that* does make sense. The sentence you end up with here
can hardly
On 2022-09-04 05:13, Chris Ruehl wrote:
Hi,
Something you might have a head up for it,
have a mediapipe application for POSE which use the T860 GPU for the
calculation
but the kernel driver report error (js fault) - I see one or 2
calculation frames on the mat-picture output only before
the
On 2022-09-04 20:15, Jingyu Wang wrote:
[...]
@@ -565,8 +566,8 @@ module_param_named(timeout_period,
amdgpu_watchdog_timer.period, uint, 0644);
*/
#ifdef CONFIG_DRM_AMDGPU_SI
-#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
-int amdgpu_si_support = 0;
+#if IS_ENABLED
Now that dma-iommu.h only contains internal interfaces, make it
private to the IOMMU subsytem.
Signed-off-by: Robin Murphy
---
drivers/acpi/viot.c | 1 -
drivers/gpu/drm/exynos/exynos_drm_dma.c | 1 -
drivers/iommu/amd/iommu.c| 2 +-
drivers
On 2022-08-22 16:20, Sascha Hauer wrote:
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a frequency range up to which the entry works, not as a frequency that
must match the pixel clock. Return MODE_
On 2022-08-23 13:21, Jilin Yuan wrote:
Delete the redundant word 'next'.
From the context, I'm not sure it is redundant - as far as I can tell
this comment seems to be describing a sequence of 3 commands, where
"current" is the first, "next" is the second, and "next next" implies
the third
On 2022-08-23 03:51, Alyssa Rosenzweig wrote:
-static size_t get_pgsize(u64 addr, size_t size)
+static size_t get_pgsize(u64 addr, size_t size, size_t *count)
{
- if (addr & (SZ_2M - 1) || size < SZ_2M)
- return SZ_4K;
+ size_t blk_offset = -addr % SZ_2M;
addr is uns
Convert to io-pgtable's bulk {map,unmap}_pages() APIs, to help the old
single-page interfaces eventually go away. Unmapping heap BOs still
wants to be done a page at a time, but everything else can get the full
benefit of the more efficient interface.
Signed-off-by: Robin Murphy
---
driver
On 2022-08-22 14:52, Robin Murphy wrote:
On 2022-08-21 19:19, Rob Clark wrote:
From: Rob Clark
Optimize TLB invalidation by using different ASID for each set of
pgtables. There can be scenarios where multiple processes end up
with the same ASID (such as >256 processes using the GPU),
On 2022-08-21 19:19, Rob Clark wrote:
From: Rob Clark
Optimize TLB invalidation by using different ASID for each set of
pgtables. There can be scenarios where multiple processes end up
with the same ASID (such as >256 processes using the GPU), but this
is harmless, it will only result in some
On 2022-08-22 12:21, Christoph Hellwig wrote:
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 70393fbb57ed..79cb6eb560a8 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -1059,4 +1059,40 @@ void iommu_debugfs_setup(void);
static inline void iommu_debugfs_setup(
kerneldoc along the way.
Signed-off-by: Robin Murphy
---
Note that iommu_setup_dma_ops() should also become internal in a future
phase of the great IOMMU API upheaval - for now as the last bit of true
arch code glue I consider it more "necessarily exposed" than "public".
dependency *too* well. Instead, let's just have it
enable itself automatically when IOMMU API support is enabled for the
relevant architectures. It can't get much clearer than that.
Signed-off-by: Robin Murphy
---
arch/arm64/Kconfig | 1 -
drivers/iommu/Kconfig | 3 +--
dri
does touch a range of areas (a couple of which
seemingly had no reason to be involved anyway), but hopefully these are
all low-impact changes that nobody minds going through the IOMMU tree.
Now for the build-bots to tell me what I've missed...
Thanks,
Robin.
Robin Murphy (3):
iommu/dma
On 2022-07-11 11:13, Liviu Dudau wrote:
[...]
But nothing worrying. It does work, though doesn't compile due to:
drivers/gpu/drm/arm/display/komeda/komeda_kms.c: In function
‘komeda_kms_atomic_commit_hw_done’:
drivers/gpu/drm/arm/display/komeda/komeda_kms.c:77:9: error: ‘for’ loop
initial declar
On 2022-07-11 12:04, Piotr Oniszczuk wrote:
Wiadomość napisana przez Robin Murphy w dniu 11.07.2022,
o godz. 12:41:
On 2022-06-25 16:31, Piotr Oniszczuk wrote:
Wiadomość napisana przez Peter Geis w dniu 25.06.2022, o
godz. 16:00:
The first issue you have is the TV isn't respo
On 2022-06-25 16:31, Piotr Oniszczuk wrote:
Wiadomość napisana przez Peter Geis w dniu 25.06.2022, o
godz. 16:00:
The first issue you have is the TV isn't responding until the absolute
end.
I suspect this is because lack on idle gaps between cec commands sent from
board to tv.
Maybe TV
On 2022-07-08 15:32, Thierry Reding wrote:
On Thu, Jul 07, 2022 at 06:30:44PM +0100, Robin Murphy wrote:
Conditional registration is a problem for other subsystems which may
unwittingly try to interact with host1x_context_device_bus_type in an
uninitialised state on non-Tegra platforms. A look
configs, so lets keep things simple and register
our context bus unconditionally too.
Signed-off-by: Robin Murphy
---
drivers/gpu/host1x/context_bus.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/host1x/context_bus.c b/drivers/gpu/host1x/context_bus.c
index b0d35b2bbe89
On 2022-05-27 00:50, Dmitry Osipenko wrote:
Hello,
This patchset introduces memory shrinker for the VirtIO-GPU DRM driver
and adds memory purging and eviction support to VirtIO-GPU driver.
The new dma-buf locking convention is introduced here as well.
During OOM, the shrinker will release BOs
On 2022-06-20 19:13, Jernej Skrabec wrote:
Kernel occasionally complains that there is mismatch in segment size
when trying to render HW decoded videos and rendering them directly with
sun4i DRM driver. Following message can be observed on H6 SoC:
[ 184.298308] [ cut here ]-
rmore we can also get rid of all the unnecesary read-modify-write
operations, since on install we know we cleared the whole interrupt mask
before enabling the debug IRQs, and thus on uninstall we're always
clearing everything as well.
Signed-off-by: Robin Murphy
---
drivers/gpu/drm/arm/hdlcd_
ll scanning
out while the rest of the registers are subsequently reconfigured.
Signed-off-by: Robin Murphy
---
Since I ended up adding (relatively) a lot here, I didn't want to
second-guess Javier's opinion so left off the R-b tag from v1.
drivers/gpu/drm/arm/hdlcd_drv.c | 7 ++
On 2022-06-14 14:48, Thomas Zimmermann wrote:
Hi
Am 14.06.22 um 15:04 schrieb Robin Murphy:
The Arm Juno board EDK2 port has provided an EFI GOP display via HDLCD0
for some time now, which works nicely as an early framebuffer. However,
once the HDLCD driver probes and takes over the hardware
On 2022-06-14 14:26, Javier Martinez Canillas wrote:
Hello Robin,
On 6/14/22 15:04, Robin Murphy wrote:
The Arm Juno board EDK2 port has provided an EFI GOP display via HDLCD0
for some time now, which works nicely as an early framebuffer. However,
once the HDLCD driver probes and takes over
about and virtual console output inevitably disappears into
the wrong place most of the time.
Signed-off-by: Robin Murphy
---
drivers/gpu/drm/arm/hdlcd_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
index af59077a5481
On 2022-06-06 16:22, Greg KH wrote:
On Mon, Jun 06, 2022 at 04:10:09PM +0100, Robin Murphy wrote:
On 2022-06-02 07:47, Daniel Vetter wrote:
On Thu, 2 Jun 2022 at 08:34, Simon Ser wrote:
On Thursday, June 2nd, 2022 at 08:25, Greg KH wrote:
On Thu, Jun 02, 2022 at 06:17:31AM +, Simon
On 2022-06-02 07:47, Daniel Vetter wrote:
On Thu, 2 Jun 2022 at 08:34, Simon Ser wrote:
On Thursday, June 2nd, 2022 at 08:25, Greg KH wrote:
On Thu, Jun 02, 2022 at 06:17:31AM +, Simon Ser wrote:
On Thursday, June 2nd, 2022 at 07:40, Greg KH g...@kroah.com wrote:
On Wed, Jun 01, 202
On 2022-05-16 11:13, Mikko Perttunen wrote:
On 5/16/22 13:07, Will Deacon wrote:
On Mon, May 16, 2022 at 11:52:54AM +0300, cyn...@kapsi.fi wrote:
From: Mikko Perttunen
Set itself as the IOMMU for the host1x context device bus, containing
"dummy" devices used for Host1x context isolation.
Sig
On 2022-05-08 17:53, Peter Geis wrote:
On Sun, May 8, 2022 at 9:40 AM Piotr Oniszczuk
wrote:
Wiadomość napisana przez Sascha Hauer w dniu
22.04.2022, o godz. 09:28:
From: Michael Riesch
Enable the RK356x Video Output Processor (VOP) 2 on the Radxa
ROCK3 Model A.
Signed-off-by: Michael
, I'd have squashed these changes across the previous patches, such
that the dodgy fwspec calls are never introduced in the first place, but
it's your driver, and if that's the way you want to work it and Rob's
happy with it too, then fine by me.
For the end result,
Reviewed-by
On 2022-05-04 01:52, Dmitry Osipenko wrote:
On 4/11/22 16:46, Robin Murphy wrote:
@@ -1092,6 +1092,19 @@ static bool host1x_drm_wants_iommu(struct host1x_device
*dev)
struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
struct iommu_domain *domain;
+ /* For start
On 2022-05-03 14:30, Dmitry Baryshkov wrote:
On Tue, 3 May 2022 at 13:57, Robin Murphy wrote:
On 2022-05-01 11:10, Dmitry Baryshkov wrote:
Move iommu_domain_alloc() in front of adress space/IOMMU initialization.
This allows us to drop final bits of struct mdp5_cfg_platform which
remained
On 2022-05-03 12:02, Heiko Stübner wrote:
Am Freitag, 22. April 2022, 09:28:28 CEST schrieb Sascha Hauer:
From: Douglas Anderson
The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor. Those
example settings weren't partic
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