On Wed, Jan 18, 2023 at 10:13:04AM +0530, Deepak R Varma wrote:
> On Tue, Jan 17, 2023 at 02:21:59PM -0500, Rodrigo Vivi wrote:
> > On Sat, Jan 14, 2023 at 07:33:53PM +0530, Deepak R Varma wrote:
> > > Convert function i9xx_pipe_crc_auto_source() to return void instead
On Mon, Jan 16, 2023 at 01:44:46PM +0800, Zhenyu Wang wrote:
> On 2023.01.10 13:49:57 -0500, Rodrigo Vivi wrote:
> > On Wed, Jan 11, 2023 at 12:00:12AM +0530, Deepak R Varma wrote:
> > > Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
> > >
ase share the coccinelle commands and files you used here?
>
> Signed-off-by: Deepak R Varma
> ---
> Please note: The change is compile tested only.
np, our CI liked it.
I liked the clean up as well:
Reviewed-by: Rodrigo Vivi
>
>
> drivers/gpu/drm/i915
On Wed, Jan 11, 2023 at 09:20:40PM +0530, Deepak R Varma wrote:
> This patch series proposes to replace a combination of
> DEFINE_SIMPLE_ATTRIBUTE() +
> debugfs_create_file() by a combination of DEFINE_DEBUGFS_ATTRIBUTE() +
> debugfs_create_file_unsafe(). The change reduced overhead in terms of
Hi Dave and Daniel,
Here goes this week fix.
There was only a small conflict in the multi-cast registers fix,
but that's pretty trivial. Just go with the -gt-next version if
needed on your side.
drm-intel-fixes-2023-01-12:
- Reserve enough fence slot for i915_vma_unbind_vsync (Nirmoy)
- Fix
On Wed, Jan 11, 2023 at 04:39:36PM +0100, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Wed, Jan 11, 2023 at 10:25:56AM -0500, Rodrigo Vivi wrote:
> > On Wed, Jan 11, 2023 at 11:44:47AM +0100, Andi Shyti wrote:
> > > From: Aravind Iddamsetty
> > >
> > > During
E(timeout_base_ms > 3)
>
> Wait 10 seconds for the punit to settle and complete any
> outstanding transactions upon module load.
10 *SECONDS* ?!
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7814
>
> Signed-off-by: Aravind Iddamsetty
> Co-developed-by
On Wed, Jan 11, 2023 at 08:46:00PM +0530, Deepak R Varma wrote:
> On Wed, Jan 11, 2023 at 10:00:11AM -0500, Rodrigo Vivi wrote:
> > > > Actually, could you please address the checkpatch issues before we can
> > > > push?
> > > > Sorry about that, but ju
On Wed, Jan 11, 2023 at 08:23:49PM +0530, Deepak R Varma wrote:
> On Wed, Jan 11, 2023 at 05:02:02AM -0500, Rodrigo Vivi wrote:
> > On Tue, Jan 10, 2023 at 01:49:57PM -0500, Rodrigo Vivi wrote:
> > > On Wed, Jan 11, 2023 at 12:00:12AM +0530, Deepak R Varma wr
On Tue, Jan 10, 2023 at 01:49:57PM -0500, Rodrigo Vivi wrote:
> On Wed, Jan 11, 2023 at 12:00:12AM +0530, Deepak R Varma wrote:
> > Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
> > function adds the overhead of introducing a proxy file operation
> &
On Tue, Jan 10, 2023 at 01:42:57PM -0600, Gustavo A. R. Silva wrote:
> On Tue, Jan 10, 2023 at 02:28:11PM -0500, Rodrigo Vivi wrote:
> >
> > On Tue, Jan 10, 2023 at 10:44:53AM -0600, Gustavo A. R. Silva wrote:
> > > Zero-length arrays are deprecated[1] and we are moving to
On Tue, Jan 10, 2023 at 10:44:53AM -0600, Gustavo A. R. Silva wrote:
> Zero-length arrays are deprecated[1] and we are moving towards
> adopting C99 flexible-array members, instead. So, replace zero-length
> arrays in a couple of structures (three, actually) with flex-array
> members.
>
> This
ollowing coccicheck make command helped identify this change:
>
> make coccicheck M=drivers/gpu/drm/i915/ MODE=patch
> COCCI=./scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
>
> Signed-off-by: Deepak R Varma
Reviewed-by: Rodrigo Vivi
(Are you planning to send the one
command in the patch log message for clarity.
> Suggested by Rodrigo Vivi
Thank you
Reviewed-by: Rodrigo Vivi
>
> drivers/gpu/drm/i915/display/intel_drrs.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display
ollowing coccicheck make command helped identify this change:
>
> make coccicheck M=drivers/gpu/drm/i915/ MODE=patch
> COCCI=./scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
>
> Signed-off-by: Deepak R Varma
I believe these 2 gvt cases could be done in one patch.
But
On Sun, Jan 08, 2023 at 01:33:41AM +0530, Deepak R Varma wrote:
> On Thu, Jan 05, 2023 at 09:13:35AM +0100, Julia Lawall wrote:
> > > Hi Julia, thanks for helping here.
> > >
> > > So, my question is why this
> > >
> > > make coccicheck M=drivers/gpu/drm/i915/ MODE=context
> > >
)
Dan Carpenter (1):
drm/i915: unpin on error in intel_vgpu_shadow_mm_pin()
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2023-01-05' of https://github.com/intel/gvt-linux
into drm-intel-fixes
Zheng Wang (1):
drm/i915/gvt: fix double free bug in split_2MB_gtt_entry
Zhenyu Wang
nce this is now getting fixed we can
> put a few more pointers in place as to how this should be done
> ideally.
>
> Motvated by some discussion with Rodrigo on irc about how drm/xe
> should lay out its sysfs interfaces.
Thank you!
Acked-by: Rodrigo Vivi
>
> Cc: Rodrigo Vivi
&g
On Wed, Jan 04, 2023 at 06:51:37PM +0100, Julia Lawall wrote:
>
>
> On Tue, 3 Jan 2023, Deepak R Varma wrote:
>
> > On Wed, Dec 28, 2022 at 06:18:12AM -0500, Rodrigo Vivi wrote:
> > > On Tue, Dec 27, 2022 at 11:36:13PM +0530, Deepak R Varma wrote:
> > >
On Tue, Jan 03, 2023 at 07:09:20PM +0300, Alexey Lukyachuk wrote:
> On Tue, 3 Jan 2023 07:46:40 -0500
> Rodrigo Vivi wrote:
>
> > On Mon, Jan 02, 2023 at 04:56:49PM +0300, Alexey Lukyachuk wrote:
> > > On Tue, 27 Dec 2022 20:40:03 +0300
> > > Alexey Lukyachuk
On Mon, Jan 02, 2023 at 04:56:49PM +0300, Alexey Lukyachuk wrote:
> On Tue, 27 Dec 2022 20:40:03 +0300
> Alexey Lukyachuk wrote:
>
> > On Tue, 27 Dec 2022 11:39:25 -0500
> > Rodrigo Vivi wrote:
> >
> > > On Sun, Dec 25, 2022 at 09:55:08PM +0300, Alexey Luky
Hi Dave and Daniel,
Here goes the initial fixes for 6.2.
The most critical ones seems to be the evict fix from Matt and
the MIPI DSI from Jani. Both targeting stable trees.
I'm sorry for sending this on a Friday and not on a Thursday as
usual. Where did this week go? Worst case this wait one
On Tue, Dec 27, 2022 at 11:36:13PM +0530, Deepak R Varma wrote:
> On Tue, Dec 27, 2022 at 12:13:56PM -0500, Rodrigo Vivi wrote:
> > On Tue, Dec 27, 2022 at 01:30:53PM +0530, Deepak R Varma wrote:
> > > Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
&
E/DEBUGFS
but the change to the unsafe option is not.
This commit message is not explaining why the unsafe is the suggested
or who suggested it.
If you remove the unsafe part feel free to resend adding:
Reviewed-by: Rodrigo Vivi
(to both patches, this and the drrs one.
Also, it looks like you could contribu
On Sun, Dec 25, 2022 at 09:55:08PM +0300, Alexey Lukyanchuk wrote:
> dell wyse 3040 doesn't peform poweroff properly, but instead remains in
> turned power on state.
okay, the motivation is explained in the commit msg..
> Additional mutex_lock and
> intel_crtc_wait_for_next_vblank
> feature
On Fri, Dec 2, 2022 at 4:17 AM Tvrtko Ursulin <
tvrtko.ursu...@linux.intel.com> wrote:
For some reason I has missed this. Thanks Tvrtko for pointing this out.
> On 01/12/2022 22:03, Zanoni, Paulo R wrote:
> > Hi
> >
> > I was given a link to https://patchwork.freedesktop.org/series/111494/
> >
Hi Dave and Daniel,
In case you end up sending more stuff towards 6.2-rc1,
please consider sending these fixes below.
The migrate related fixes seems to be the most important
ones, but also I don't believe it looks so critical that
it couldn't wait for the -rc2.
Here goes
On Wed, Dec 14, 2022 at 11:37:19PM +0100, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Tue, Dec 13, 2022 at 01:18:48PM +, Vivi, Rodrigo wrote:
> > On Tue, 2022-12-13 at 00:08 +0100, Andi Shyti wrote:
> > > Hi Rodrigo,
> > >
> > > On Mon, Dec 12, 20
On Mon, Dec 12, 2022 at 05:13:38PM +0100, Andi Shyti wrote:
> From: Chris Wilson
>
> After applying an engine reset, on some platforms like Jasperlake, we
> occasionally detect that the engine state is not cleared until shortly
> after the resume. As we try to resume the engine with volatile
On Mon, Dec 12, 2022 at 11:20:12AM +0800, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:112: warning: expecting
> prototype for intel_guc_hwconfig_init(). Prototype was for
> guc_hwconfig_init() instead.
>
> Link:
On Wed, Dec 07, 2022 at 03:29:09PM +0400, Miaoqian Lin wrote:
> intel_uncore_forcewake_put__locked() is used to release a reference.
>
> Fixes: a6111f7b6604 ("drm/i915: Reduce locking in execlist command
> submission")
> Signed-off-by: Miaoqian Lin
Reviewed-by: Rod
aul Cercueil
> ---
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: intel-...@lists.freedesktop.org
> ---
> drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 8 +---
> 1 file changed, 1 insertion(+),
Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Alan Previn
> Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 23 +
> drivers/gpu/drm/i915/i915_reg.h | 3 ++
> drivers/gpu/drm/i915/intel_uncore.c
On Fri, Dec 02, 2022 at 03:28:21PM -0800, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
> contexts and protected buffers can be subscribed by process
> workloads on any tile. However,
gt; returned by GRAPHICS_VER().
>
> Reported-by: kernel test robot
> Fixes: 3100240bf846 ("drm/i915/mtl: Add hardware-level lock for steering")
> Cc: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_gt_mcr
On Thu, Dec 01, 2022 at 05:14:07PM -0800, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
> contexts and protected buffers can be subscribed by process
> workloads on any tile. However,
Hi Dave and Daniel,
Here goes our next-fixes targeting 6.2-rc1.
Please notice that DG2 DMC had a minor bump version in order
to fix the remaining issues related to PCI warns at DC state
transition. I didn't request the team to provide the fallback
to the previous version because we are moving
On Tue, Nov 22, 2022 at 02:58:37PM -0800, Ceraolo Spurio, Daniele wrote:
>
>
> On 11/22/2022 12:52 PM, Rodrigo Vivi wrote:
> > On Mon, Nov 21, 2022 at 03:16:16PM -0800, Daniele Ceraolo Spurio wrote:
> > > From: Jonathan Cavitt
> > >
> > > The GSC CS i
On Tue, Nov 22, 2022 at 02:50:17PM -0800, Ceraolo Spurio, Daniele wrote:
>
>
> On 11/22/2022 12:46 PM, Rodrigo Vivi wrote:
> > On Mon, Nov 21, 2022 at 03:16:15PM -0800, Daniele Ceraolo Spurio wrote:
> > > If the GSC was loaded, the only way to stop it during the driver un
On Tue, Nov 22, 2022 at 11:39:31AM -0800, Ceraolo Spurio, Daniele wrote:
>
>
> On 11/22/2022 11:01 AM, Rodrigo Vivi wrote:
> > On Mon, Nov 21, 2022 at 03:16:14PM -0800, Daniele Ceraolo Spurio wrote:
> > > GSC FW is loaded by submitting a dedicated command via the GSC
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Matt Roper
> Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_pci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/
urio
> Cc: Matt Roper
> Cc: John C Harrison
> Cc: Rodrigo Vivi
> Cc: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 18 ++
> drivers/gpu/drm/i915/intel_uncore.c | 3 +++
> 2 files changed, 21 insertions(+)
>
> diff --git a/d
On Mon, Nov 21, 2022 at 03:16:15PM -0800, Daniele Ceraolo Spurio wrote:
> If the GSC was loaded, the only way to stop it during the driver unload
> flow is to do a driver-FLR.
> The driver-FLR is not the same as PCI config space FLR in that
> it doesn't reset the SGUnit and doesn't modify the PCI
On Mon, Nov 21, 2022 at 03:16:14PM -0800, Daniele Ceraolo Spurio wrote:
> GSC FW is loaded by submitting a dedicated command via the GSC engine.
> The memory area used for loading the FW is then re-purposed as local
> memory for the GSC itself, so we use a separate allocation instead of
> using
fetch time and add it later on when we've agreed on the approach.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Alan Previn
> Cc: John Harrison
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 29 +++-
> 1 file changed,
ust" for commit message requiring the
> > justification for the commit being in topic/core-for-CI.
> >
> > Cc: Joonas Lahtinen
> > Cc: Rodrigo Vivi
> > Cc: Tvrtko Ursulin
> > Cc: David Airlie
> > Cc: Daniel Vetter
> > Cc: intel-...@lists.free
drm/i915: gvt: fix kernel-doc trivial warnings
Paulo Miguel Almeida (1):
i915/gvt: remove hardcoded value on crc32_start calculation
Radhakrishna Sripada (2):
drm/i915/mtl: Fix dram info readout
drm/i915/mtl: Skip doubling channel numbers for LPDDR4/LPDDDR5
Rodrigo Vivi (2):
Merg
requirement and enable the platform by default.
>
> Cc: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Jani Nikula
> Signed-off-by: Matt Roper
Acked-by: Rodrigo Vivi
I'm going to merge this soon. Thanks to everyone involved.
> ---
>
> There was som
On Fri, Nov 18, 2022 at 09:32:37AM -0500, Rodrigo Vivi wrote:
> On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote:
> >
> >
> > On 18-11-2022 03:44, Rodrigo Vivi wrote:
> > > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote:
>
>
> On 18-11-2022 03:44, Rodrigo Vivi wrote:
> > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
> > > From: Vinay Belgaumkar
> > >
> > > By defaut idle mesagin
On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
> From: Vinay Belgaumkar
>
> By defaut idle mesaging is disabled for GSC CS so to unblock RC6
> entry on media tile idle messaging need to be enabled.
>
> v2:
> - Fix review comments (Vinay)
> - Set GSC idle hysterisis to 5 us
On Mon, Nov 14, 2022 at 06:03:43PM +0530, Badal Nilawar wrote:
> This series includes the code changes to get CAGF, RC State and C6
> Residency of MTL.
>
> v3: Included "Use GEN12 RPSTAT register" patch
>
> v4:
> - Rebased
> - Dropped "Use GEN12 RPSTAT register" patch from this series
>
On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
> From: Vinay Belgaumkar
>
> By defaut idle mesaging is disabled for GSC CS so to unblock RC6
> entry on media tile idle messaging need to be enabled.
>
> v2:
> - Fix review comments (Vinay)
> - Set GSC idle hysterisis to 5 us
On Mon, Nov 14, 2022 at 01:02:46PM +0200, Jani Nikula wrote:
> On Mon, 14 Nov 2022, Hans de Goede wrote:
> > Hi,
> >
> > On 11/14/22 11:10, Jani Nikula wrote:
> >> On Mon, 14 Nov 2022, Hans de Goede wrote:
> >>> Hi,
> >>>
> >>> On 11/14/22 00:23, Stephen Rothwell wrote:
> Hi all,
>
>
independently of any Kconfig option. Thanks to that, bugs and other
> regressions are subsequently easier to catch.
>
> Signed-off-by: Paul Cercueil
> ---
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: intel-...@lists.
rect workaround id (Matt)
> - Fix review comments (Rodrigo)
>
> Cc: Rodrigo Vivi
> Cc: Radhakrishna Sripada
> Cc: Vinay Belgaumkar
> Cc: Chris Wilson
> Signed-off-by: Badal Nilawar
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_gt_pm.c |
around pcode expect kmd to send mailbox message "media busy" when
> components of Media tile is in use and "media not busy" when not in use.
> As per workaround description gucrc need to be disabled so enabled
> host based RC for Media tile.
>
> HSD: 14017210380
&g
Hi Dave and Daniel,
Here goes the first chunk of drm-intel-next targeting 6.2
The highlight goes to Ville with many display related clean-up
and improvement, some other MTL enabling work and many other
fixes and small clean-ups.
drm-intel-next-2022-10-28:
- Hotplug code clean-up and
str_yes_no(mtl_powergate_enable &
> GEN9_MEDIA_PG_ENABLE));
> + } else {
> + seq_printf(m, "Render Well Gating Enabled: %s\n",
> +str_yes_no(mtl_powergate_enable &
> GEN9_RENDER_PG_ENABLE));
> + }
> +
>
On Mon, Oct 24, 2022 at 12:16:28PM -0700, Dixit, Ashutosh wrote:
> On Fri, 21 Oct 2022 09:35:32 -0700, Rodrigo Vivi wrote:
> >
>
> Hi Rodrigo,
>
> > On Wed, Oct 19, 2022 at 04:37:21PM -0700, Ashutosh Dixit wrote:
> > > From: Badal Nilawar
> > >
>
On Sat, Oct 22, 2022 at 02:09:47PM +0800, wangjianli wrote:
> Delete the redundant word 'the'.
I believe we should put an end in patches like this.
Please accumulate all the s/the the/the and other small
comment fixes that are under drivers/gpu/drm/i915 in a single
commit.
>
> Signed-off-by:
On Wed, Oct 19, 2022 at 04:37:21PM -0700, Ashutosh Dixit wrote:
> From: Badal Nilawar
>
> Add support for C6 residency and C state type for MTL SAMedia. Also add
> mtl_drpc.
I believe this patch deserves a slip between the actual support and
the debugfs, but I'm late to the review, so feel free
num" in function arguments
> - Naming: intel_rc6_* for enum
> - Use INTEL_RC6_RES_MAX and other minor changes
> v3: Don't include intel_rc6_types.h in intel_rc6.h (Jani)
>
> Suggested-by: Rodrigo Vivi
> Suggested-by: Jani Nikula
> Reported-by: Jani Nikula
> Signed-o
: Use REG_FIELD_GET and uncore (Rodrigo)
> >
> > Bspec: 66300
>
> Reviewed-by: Ashutosh Dixit
Acked-by: Rodrigo Vivi
>
> >
> > Signed-off-by: Ashutosh Dixit
> > Signed-off-by: Badal Nilawar
> > ---
> > drivers/gpu/drm/i915/gt/intel_gt_regs.
ead to GEN12_RPSTAT1 in
> read_cagf (Ashutosh)
> v4: Remove GEN12_CAGF_SHIFT and use REG_FIELD_GET (Rodrigo)
>
> Cc: Don Hiatt
> Cc: Andi Shyti
> Signed-off-by: Don Hiatt
> Signed-off-by: Badal Nilawar
> Signed-off-by: Ashutosh Dixit
> Reviewed-by: Andi S
On Wed, Oct 19, 2022 at 04:37:17PM -0700, Ashutosh Dixit wrote:
> Instead of masks/shifts settle on REG_FIELD_GET as the standard way to
> extract reg fields. This allows future patches touching this code to also
> consistently use REG_FIELD_GET and friends.
>
> Suggested-b
On Tue, Oct 18, 2022 at 10:20:40PM -0700, Ashutosh Dixit wrote:
> From: Don Hiatt
>
> On GEN12+ use GEN12_RPSTAT register to get actual resolved GT
> freq. GEN12_RPSTAT does not require a forcewake and will return 0 freq if
> GT is in RC6.
>
> v2:
> - Fixed review comments(Ashutosh)
> -
On Tue, Oct 18, 2022 at 10:20:41PM -0700, Ashutosh Dixit wrote:
> From: Badal Nilawar
>
> Update CAGF functions for MTL to get actual resolved frequency of 3D and
> SAMedia.
>
> v2: Update MTL_MIRROR_TARGET_WP1 position/formatting (MattR)
> Move MTL branches in cagf functions to top (MattR)
On Thu, Oct 06, 2022 at 05:24:34PM -0400, Rodrigo Vivi wrote:
> On Wed, Oct 05, 2022 at 08:59:43AM -0700, Vinay Belgaumkar wrote:
> > Read the values stored in the SLPC structures. Remove the
> > fields that are no longer valid (like RPS interrupts) as
> > well.
> >
>
ell, my feelings with these are:
1. We have these already in sysfs and we don't need to duplicated here.
But we have this already duplicated for years
2. We should probably simply remove this file when using SLPC and force
folks to look to the sysfs files?
3. Maybe we should take the simpl
On Tue, Sep 27, 2022 at 11:20:17AM +0530, Badal Nilawar wrote:
> From: Dale B Stimson
>
> Use i915 HWMON to display device level energy input.
>
> v2: Updated the date and kernel version in feature description
> v3:
> - Cleaned up hwm_energy function and removed unused function
>
Hi Dave and Daniel,
Here goes drm-intel-fixes-2022-09-29:
- Restrict forced preemption to the active context (Chris)
- Restrict perf_limit_reasons to the supported platforms - gen11+ (Ashutosh)
Thanks,
Rodrigo.
The following changes since commit f76349cf41451c5c42a99f18a9163377e4b364ff:
On Wed, Sep 28, 2022 at 12:02:12PM -0700, Ashutosh Dixit wrote:
> Register GT0_PERF_LIMIT_REASONS (0x1381a8) is available only for
> Gen11+. Therefore ensure perf_limit_reasons sysfs files are created only
> for Gen11+. Otherwise on Gen < 5 accessing these files results in the
> following oops:
>
On Wed, Sep 28, 2022 at 11:17:06AM -0700, Dixit, Ashutosh wrote:
> On Wed, 28 Sep 2022 04:38:46 -0700, Jani Nikula wrote:
> >
> > On Mon, 19 Sep 2022, Ashutosh Dixit wrote:
> > > Register GT0_PERF_LIMIT_REASONS (0x1381a8) is available only for
> > > Gen11+. Therefore ensure perf_limit_reasons
On Fri, Sep 16, 2022 at 01:48:23PM -0700, Ashutosh Dixit wrote:
> From: Chris Wilson
>
> If attempting to perform a GT reset takes long than 5 seconds (including
> resetting the display for gen3/4), then we declare all hope lost and
> discard all user work and wedge the device to prevent
On Thu, Sep 22, 2022 at 02:39:16PM -0700, Niranjana Vishwanathapura wrote:
> The function parameter 'exclude' in funciton
> i915_sw_fence_await_reservation() is not used.
> Remove it.
>
> Reviewed-by: Tvrtko Ursulin
> Signed-off-by: Niranjana Vishwanathapura
pushed to drm-intel-next.
Thanks
Hi Dave and Daniel,
Here goes drm-intel-fixes-2022-09-21:
2 gem context related fixes:
- to avoid a general protection failure when using perf/OA (Chris)
- to avoid kernel warnings on driver release (Janusz)
Thanks,
Rodrigo.
The following changes since commit
gitlab.freedesktop.org/drm/intel/-/issues/6863
> Fixes: fe5979665f64 ("drm/i915/debugfs: Add perf_limit_reasons in debugfs")
> Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
> Signed-off-by: Ashutosh Dixit
Reviewed-by: Rodrigo Vivi
>
Hi Dave and Daniel,
Nothing that big for this round, but a couple targeting stable.
Here goes drm-intel-fixes-2022-09-15:
- Revert a display patch around max DP source rate now
that the proper WaEdpLinkRateDataReload is in place. (Ville)
- Fix perf limit reasons bit position. (Ashutosh)
- Fix
On Fri, Sep 09, 2022 at 11:35:28AM +0200, Aurélien wrote:
>Hi,
>I hope this mailing-mist is the right place for this question.
+ dri-devel mailing list that looks more appropriated.
+ Hans and Lyude who were recently working to standardize some of the
backlight stuff.
>I would like
ehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v3 00/37] at:
> https://lore.kernel.org/all/cover.1662708705.git.mche...@kernel.org/
>
> drivers/gpu/drm/i915/display/i
intel_wakeref.h and
> intel_runtime_pm.c.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v3 00/37] at:
> https://lore.kernel.org/a
les); do if [ "$(git grep $i
> Documentation/)" == "" ]; then echo "$i"; fi; done >aaa
>
> Add them to i915.rst as well.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of peo
to indicate what changed from the previous submission,
something like
v2: re-organizing the blocks to group gtt stuff.
that helps reviewers to know if their change requested was
addressed or not.
but anyways:
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
&
is in use. (Rodrigo)
- Implement Workaround for eDP. (Ville)
- Fix has_flat_ccs selection for DG1. (Matt)
Matthew Auld (1):
drm/i915: consider HAS_FLAT_CCS() in needs_ccs_pages
Rodrigo Vivi (1):
drm/i915/slpc: Let's fix
5/ttm: fix CCS handling
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2022-08-22' of https://github.com/intel/gvt-linux
into drm-intel-fixes
Ville Syrjälä (1):
drm/i915: Skip wm/ddb readout for disabled pipes
Łukasz Bartosik (1):
drm/i915: fix null pointer dereference
drivers/gpu/drm
"drm/i915/guc: Make GuC log sizes runtime configurable")
> Signed-off-by: Joonas Lahtinen
> Cc: Jani Nikula
> Cc: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: John Harrison
> Cc: Alan Previn
> Reviewed-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> driver
ix kernel-doc
drm/i915/gvt: Fix kernel-doc
drm/i915/gvt: Fix kernel-doc
Jouni Högander (1):
drm/i915/backlight: Disable pps power hook for aux based backlight
Julia Lawall (1):
drm/i915/gvt: fix typo in comment
Matthew Auld (1):
drm/i915/ttm: fix CCS handling
Rodrig
read for obtaining
> the correct efficient frequency for Gen9+.
>
> We see much better perf numbers with benchmarks like glmark2 with
> efficient frequency usage enabled as expected.
>
> v2: Address review comments (Rodrigo)
>
> BugLink: https://gitlab.freedesktop.org/drm
read for obtaining
> the correct efficient frequency for Gen9+.
>
> We see much better perf numbers with benchmarks like glmark2 with
> efficient frequency usage enabled as expected.
>
> BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/5468
>
> Cc: Rodrigo Vivi
Firs
On Tue, Aug 09, 2022 at 05:03:06PM -0700, Vinay Belgaumkar wrote:
> Host Turbo operates at efficient frequency when GT is not idle unless
> the user or workload has forced it to a higher level. Replicate the same
> behavior in SLPC by allowing the algorithm to use efficient frequency.
> We had
Hi Dave and Daniel,
And here is the right one. And now including all the
fixes.
Here goes drm-intel-next-fixes-2022-08-11:
- disable pci resize on 32-bit systems (Nirmoy)
- don't leak the ccs state (Matt)
- TLB invalidation fixes (Chris)
[now with all fixes of fixes]
Thanks,
Rodrigo.
The
On Mon, Aug 08, 2022 at 04:05:55PM +0530, Anshuman Gupta wrote:
> As per PCIe Spec Section 5.3,
> When a Type 1 Function associated with a Switch/Root
> Port (a “virtual bridge”) is in a non-D0 power state,
> it will emulate the behavior of a conventional PCI bridge
> in its handling of Memory,
e_region'
> drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:199: warning: Excess
> function parameter 'allow_gpu' description in 'i915_ttm_restore_region'
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large numbe
On Wed, Jul 13, 2022 at 09:12:23AM +0100, Mauro Carvalho Chehab wrote:
> There are other files with kernel-doc markups:
>
> $ git grep -l "/\*\*" $(git ls-files|grep drivers/gpu/drm/i915/)
> >kernel-doc-files
> $ for i in $(cat kernel-doc-files); do if [ "$(git grep $i
>
On Wed, Jul 13, 2022 at 09:12:27AM +0100, Mauro Carvalho Chehab wrote:
> Currently, functions inside GuC aren't presented as part of the
> GuC documentation.
>
> Add them.
>
> Signed-off-by: Mauro Carvalho Chehab
could be squashed to the other guc patch, but anyways:
Reviewe
On Wed, Jul 13, 2022 at 09:12:19AM +0100, Mauro Carvalho Chehab wrote:
> There are several documented GuC kAPI that aren't currently part
> of the docs. Add them, as this allows identifying issues with
> badly-formatted tags.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-b
On Wed, Jul 13, 2022 at 09:12:26AM +0100, Mauro Carvalho Chehab wrote:
> The intel_gt_pm.h file contains some convenient macros to be used
> in GT code in order to get/put runtime PM references and for
> checking them.
>
> Add descriptions based on the ones at intel_wakeref.h and
>
On Wed, Jul 13, 2022 at 09:12:24AM +0100, Mauro Carvalho Chehab wrote:
> commit d1b48c1e7184 ("drm/i915: Replace execbuf vma ht with an idr")
> added a rbtree list to allow searching for obj/ctx.
>
> Document it.
>
> Signed-off-by: Mauro Carvalho Chehab
On Wed, Jul 13, 2022 at 09:12:25AM +0100, Mauro Carvalho Chehab wrote:
> This is a large struct used to describe gem objects. It is
> currently partially documented. Finish its documentation, filling
> the gaps from git logs.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-b
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