From: Juha-Pekka Heikkila
Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_sprite.c | 28 ++--
1
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
drivers/gpu/drm/i915/intel_sprite.c | 60 +++-
2 files changed, 89
From: Juha-Pekka Heikkila
Add needed plane control flag definitions for P010, P012 and
P016 formats.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a
Added needed plane control flag definitions for Y2xx and Y4xx (10, 12 and
16 bits)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
1 file changed, 6 insertions(+)
diff
From: Juha-Pekka Heikkila
Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
drivers
s for valid data,
doesn't require any padding bits. Thus, each pixel
occupies 64 bits.
v3: fixed missing tab for XYUV (JP)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/drm_fourcc.c | 6 ++
includ
915: Preparations for enabling P010, P012, P016 formats
drm/i915: Enable P010, P012, P016 formats for primary and sprite
planes
Swati Sharma (3):
drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control
definitions
drm/i9
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
drivers/gpu/drm/i915/intel_sprite.c | 60 +++-
2 files changed, 89
s for valid data,
doesn't require any padding bits. Thus, each pixel
occupies 64 bits.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/drm_fourcc.c | 6 ++
include/uapi/drm/drm_fourcc.h | 18 +-
2 files changed, 23 insert
Added needed plane control flag definitions for Y2xx and Y4xx (10, 12 and
16 bits)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
1 file changed, 6 insertions(+)
diff
From: Juha-Pekka Heikkila
Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
drivers
From: Juha-Pekka Heikkila
Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_sprite.c | 28 ++--
1
2, P016 formats
drm/i915: Enable P010, P012, P016 formats for primary and sprite
planes
Swati Sharma (3):
drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control
definitions
drm/i915/icl: Enabling Y2xx and Y4xx (xx:
From: Juha-Pekka Heikkila
Add needed plane control flag definitions for P010, P012 and
P016 formats.
Signed-off-by: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a
intel_display.c and
intel_sprite.c. (juha)
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_sprite.c | 49 +++--
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
v3: no change
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers
v3: case handling checking INTEL_GEN(dev_priv) < 11 added for these 3
new pixel formats (juha)
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 9 +
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed,
order of yuv samples needs to be defined for Y210/
Y212/Y216 (update from h/w folks): not including in this patch,
will do in other patch series (if reqd)
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/drm_fourcc.c | 3 +++
include/uap
hdr handling of these 64 bit pixel format not inscope
of this series
v3: addressed review comments of Juha-pekka(JP)
v4: rebase
Swati Sharma (4):
drm: Add Y210, Y212, Y216 format definitions and fourcc
drm/i915/icl: Add Y210, Y212, Y216 plane control definitions
drm/i915/icl
function run_tests_for_pipe, file kms_color.c:847:
Test requirement: p < data->display.n_pipes
[Why]
degamma_lut_size assigned 0
[How]
degamma_lut_size should be 35
BSpec:18433
Testcase:igt/kms_color/pipe-A-gamma
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/i915_pci.c | 2 +-
1 f
These patches enable packed format YUV422-Y210, Y212 and Y216
for 10, 12 and 16 bit respectively for ICL.
For user space component IGT
IGT needs libraries for Pixman and Cairo to support more than 8bpc.
Work going on from Maarten Lankhorst.
v2: addressed review comments of mahesh and alexandru
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
v3: no change
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915
From: Vidya Srinivas
v3: case handling checking INTEL_GEN(dev_priv) < 11 added for these 3
new pixel formats (juha)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 21 +
drivers/gpu/drm/i915/intel_sprite.c |
the same in intel_display.c and
intel_sprite.c. (juha)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 58
drivers/gpu/drm/i915/intel_sprite.c | 42 --
2 files changed, 92
(juha)
different order of yuv samples needs to be defined for Y210/
Y212/Y216 (update from h/w folks): not including in this patch,
will do in other patch series (if reqd)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/drm_fourcc.c | 3 +++
include/uap
From: Vidya Srinivas
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
From: Vidya Srinivas
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915
econd luma sample is
accompanied by the first V sample.
v2: is_yuv setted to true (mahesh)
different order of yuv samples (mahesh): still update from
hardware team pending
change in comment (alexandru)
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/drm_fou
These patches enable packed format YUV422-Y210, Y212 and Y216
for 10, 12 and 16 bit respectively for ICL.
For user space component IGT:WIP
v2: addressed review comments of mahesh and alexandru
hdr handling of these 64 bit pixel format not inscope
of this series
Vidya Srinivas (4):
drm
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu
From: Vidya Srinivas
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915
These patches enable packed format YUV422-Y210, Y212 and Y216
for 10, 12 and 16 bit respectively for ICL.
For user space component IGT:WIP
Vidya Srinivas (4):
drm: Add Y210, Y212, Y216 format definitions and fourcc
drm/i915: Add Y210, Y212, Y216 plane control definitions
drm/i915: Preparati
From: Vidya Srinivas
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu
anied by first U sample and second luma sample is
accompanied by the first V sample.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/drm_fourcc.c | 3 +++
include/uapi/drm/drm_fourcc.h | 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/drm_fou
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