On Tue, 2023-11-14 at 12:37 +, Tvrtko Ursulin wrote:
>
> On 10/11/2023 18:22, Michal Wajdeczko wrote:
> > The Single Root I/O Virtualization (SR-IOV) extension to the PCI
> > Express (PCIe) specification suite is supported starting from 12th
> > generation of Intel Graphics processors.
> >
>
On Mon, 2023-08-21 at 14:00 -0700, Ceraolo Spurio, Daniele wrote:
>
>
> On 8/21/2023 9:22 AM, Jani Nikula wrote:
> > On Mon, 21 Aug 2023, "Ricardo B. Marliere"
> > wrote:
> > > This patch fixes the following sphinx warnings in the htmldocs
> > > make target:
> > >
> > > Documentation/gpu/i915:5
On Tue, 2022-12-13 at 13:50 +0800, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:112: warning:
> expecting prototype for intel_guc_hwconfig_init(). Prototype was for
> guc_hwconfig_init() instead.
Thank you for the patch and for a
On Tue, 2022-12-13 at 00:08 +0100, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Mon, Dec 12, 2022 at 11:55:10AM -0500, Rodrigo Vivi wrote:
> > On Mon, Dec 12, 2022 at 05:13:38PM +0100, Andi Shyti wrote:
> > > From: Chris Wilson
> > >
> > > After applying an engine reset, on some platforms like
> > > J
On Fri, 2022-12-02 at 19:21 +, Teres Alexis, Alan Previn wrote:
>
>
> On Fri, 2022-12-02 at 11:22 -0500, Vivi, Rodrigo wrote:
> > On Thu, Dec 01, 2022 at 05:14:07PM -0800, Alan Previn wrote:
> > > Starting with MTL, there will be two GT-tiles, a render and media
>
On Wed, 2022-11-30 at 09:32 -0800, Matt Roper wrote:
> On Tue, Nov 29, 2022 at 06:02:45PM -0800, Alan Previn wrote:
> > Starting with MTL, there will be two GT-tiles, a render and media
> > tile. PXP as a service for supporting workloads with protected
>
> Drive-by comment: we've been a bit incon
On Sat, 2022-11-19 at 09:02 +0530, Nilawar, Badal wrote:
>
>
> On 19-11-2022 00:07, Vivi, Rodrigo wrote:
> > On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
> > > From: Vinay Belgaumkar
> > >
> > > By defaut idle messaging is disabled for GSC
On Fri, 2022-11-18 at 13:37 -0800, Dixit, Ashutosh wrote:
> On Fri, 18 Nov 2022 10:37:37 -0800, Vivi, Rodrigo wrote:
> >
> > On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
> > > From: Vinay Belgaumkar
> > >
> > > By defaut idle messagin
On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
> From: Vinay Belgaumkar
>
> By defaut idle messaging is disabled for GSC CS so to unblock RC6
> entry on media tile idle messaging need to be enabled.
>
> v2:
> - Fix review comments (Vinay)
> - Set GSC idle hysteresis as per spec (Badal
On Sat, 2022-10-29 at 02:41 +0300, Ville Syrjälä wrote:
> On Fri, Oct 28, 2022 at 02:22:33PM -0400, Rodrigo Vivi wrote:
> > Hi Dave and Daniel,
> >
> > Here goes the first chunk of drm-intel-next targeting 6.2
> >
> > The highlight goes to Ville with many display related clean-up
> > and improvem
On Sun, 2022-09-11 at 19:22 +0200, Jason A. Donenfeld wrote:
> Hi Rodrigo,
>
> On Thu, Sep 08, 2022 at 09:59:54AM -0400, Rodrigo Vivi wrote:
> > Hi Dave and Daniel,
> >
> > A few fixes, but most targeting stable.
> >
> > [...]
> >
> > Ville Syrjälä (2):
> > drm/i915: Implement WaEdpLinkRa
On Thu, 2022-08-18 at 13:42 -0700, Vinay Belgaumkar wrote:
> These tests were specifically designed for host Turbo. Skip
> them when SLPC is enabled as they fail frequently. We will look
> to keep adding to SLPC test coverage with these scenarios.
>
> Bug: https://gitlab.freedesktop.org/drm/intel/
On Tue, 2022-08-09 at 01:09 +0200, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Mon, Aug 08, 2022 at 03:04:13PM -0400, Rodrigo Vivi wrote:
> > On Mon, Aug 08, 2022 at 06:37:58PM +0200, Andi Shyti wrote:
> > > Hi Mauro,
> > >
> > > On Thu, Aug 04, 2022 at 09:37:22AM +0200, Mauro Carvalho Chehab
> > > wr
On Wed, 2022-07-13 at 17:31 -0400, Rodrigo Vivi wrote:
> Hi Dave and Daniel,
>
> On behalf of Tvrtko, who is recovering from Covid,
> here goes the latest drm-intel-gt-next pull request
> targeting 5.20.
Hi Folks,
any particular issue with this pull request?
We just realized it is not yet part
On Sun, 2022-07-17 at 09:20 -0700, Guenter Roeck wrote:
> Commit aff1e0b09b54 ("drm/i915/ttm: fix sg_table construction")
> introduces
> an additional parameter to i915_rsgt_from_mm_node(). The parameter is
> used
> to calculate segment_pages. This in turn is used in DIV_ROUND_UP() as
> divisor. So
On Sat, 2022-07-16 at 15:08 -0700, Linus Torvalds wrote:
> On Sat, Jul 16, 2022 at 2:35 PM Linus Torvalds
> wrote:
> >
> > That said, even those type simplifications do not fix the
> > fundamental
> > issue. That "DIV_ROUND_UP()" still ends up being a 64-bit divide,
> > although now it's at least
On Tue, 2022-02-22 at 11:44 -0800, Lucas De Marchi wrote:
> On Mon, Feb 21, 2022 at 11:21:35AM +0200, Jani Nikula wrote:
> > On Mon, 21 Feb 2022, Dave Airlie wrote:
> > > On Thu, 17 Feb 2022 at 20:26, Joonas Lahtinen
> > > wrote:
> > > >
> > > > Hi Dave & Daniel,
> > > >
> > > > Here is the fir
On Tue, 2021-11-23 at 09:17 +, Tvrtko Ursulin wrote:
>
> On 22/11/2021 18:44, Rodrigo Vivi wrote:
> > On Wed, Nov 17, 2021 at 02:49:55PM -0800, Vinay Belgaumkar wrote:
> > > From: Chris Wilson
> > >
> > > While the power consumption is proportional to the frequency,
> > > there is
> > > also
On Thu, 2021-11-11 at 14:42 +0200, Ville Syrjälä wrote:
> On Wed, Nov 10, 2021 at 05:24:22PM -0500, Rodrigo Vivi wrote:
> > On Wed, Nov 10, 2021 at 01:46:46PM +0200, Ville Syrjälä wrote:
> > > On Wed, Nov 10, 2021 at 10:59:26AM +0530, Tilak Tangudu wrote:
> > > > Enable runtime pm autosuspend by de
On Wed, 2021-10-27 at 10:48 +0100, Matthew Auld wrote:
> On Wed, 27 Oct 2021 at 10:44, Jani Nikula
> wrote:
> >
> > On Wed, 27 Oct 2021, Matthew Auld
> > wrote:
> > > On Wed, 27 Oct 2021 at 09:58, Jani Nikula
> > > wrote:
> > > >
> > > > On Wed, 27 Oct 2021, Matthew Auld
> > > > wrote:
> > >
On Thu, 2021-08-26 at 10:23 +0200, Maxime Ripard wrote:
> On Wed, Aug 25, 2021 at 04:03:43PM +0000, Vivi, Rodrigo wrote:
> > On Tue, 2021-08-24 at 18:48 +0200, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 8/24/21 10:45 AM, Jani Nikula wrote:
> > >
On Tue, 2021-08-24 at 18:48 +0200, Hans de Goede wrote:
> Hi,
>
> On 8/24/21 10:45 AM, Jani Nikula wrote:
> > On Fri, 20 Aug 2021, Hans de Goede wrote:
> > > Hello drm-misc and drm-intel maintainers,
> > >
> > > My "Add support for out-of-band hotplug notification" patchset:
> > > https://patchw
On Wed, 2020-12-09 at 14:11 +0200, Ville Syrjälä wrote:
> On Thu, Dec 03, 2020 at 05:47:05AM -0800, Rodrigo Vivi wrote:
> > Hi Dave and Daniel,
> >
> > Please ignore the pull request I had sent yesterday and use only
> > this one.
> >
> > I had missed one patch: 14d1eaf08845 ("drm/i915/gt: Protec
> On Nov 12, 2020, at 4:32 PM, Dave Airlie wrote:
>
> On Fri, 13 Nov 2020 at 09:08, Rodrigo Vivi wrote:
>>
>> Hi Dave and Daniel,
>>
>> This is the same set as last week + couple new fixes targeting stable.
>>
>
> But I merged last weeks set and it's in rc3, maybe you can generate
> the p
> ; intel-gfx@ intel-...@lists.freedesktop.org>; Souza, Jose ;
> dri-devel@ ;
> Surendrakumar Upadhyay, TejaskumarX
> ; K, SrinivasX
> ; Vivi, Rodrigo ; Meena,
> Mahesh
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/ehl: Remove require_force_probe
> protection
>
> On Oct 12, 2020, at 2:47 PM, Lyude Paul wrote:
>
> Just pushed this, but it's not in drm-tip because it would seem that
> rebuilding
> drm-tip has failed, and the conflict doesn't appear to be from any of the
> patches I pushed so I'm getting the feeling from the DRM maintainer docs I
> shou
From: Souza, Jose
> Sent: 06 October 2020 23:33
> To: Vivi, Rodrigo ; ch...@chris-wilson.co.uk
> Cc: Ausmus, James ; Nikula, Jani
> ; Pandey, Hariom ; Roper,
> Matthew D ; intel-...@lists.freedesktop.org;
> dri-devel@lists.freedesktop.org; K, SrinivasX ;
> Surendrakumar
> On Oct 6, 2020, at 10:48 AM, Chris Wilson wrote:
>
> Quoting Souza, Jose (2020-10-06 18:46:45)
>> +Rodrigo and Jani
>>
>> On Tue, 2020-10-06 at 14:56 +, Kamati Srinivas wrote:
>>> Removing force probe protection from EHL platform. Did
>>> not observe warnings, errors, flickering or any
> On Aug 10, 2020, at 5:49 AM, Daniel Vetter wrote:
>
> On Sat, Aug 08, 2020 at 05:24:53PM +0200, Daniel Vetter wrote:
>> On Sat, Aug 8, 2020 at 1:28 PM Greg KH wrote:
>>>
>>> On Sat, Aug 08, 2020 at 01:02:34PM +0200, Daniel Vetter wrote:
On Sat, Aug 8, 2020 at 12:24 PM Greg KH wrote:
> On Aug 6, 2020, at 9:30 PM, Dave Airlie wrote:
>
> On Fri, 7 Aug 2020 at 14:03, Dave Airlie wrote:
>>
>> On Fri, 7 Aug 2020 at 11:13, Rodrigo Vivi wrote:
>>>
>>> From: Rodrigo Vivi
>>>
>>> These are missed cases that I just identified with allyesconfig build.
>>>
>>
>> Is this agains
Outch, it reapared on the backmerge I did yesterday and I didn't noticed. Sorry
Chris has fixed this now.
Thank you both.
> On Aug 22, 2019, at 3:20 AM, Stephen Rothwell wrote:
>
> Hi all,
>
> I noticed that the drm tree has been back merge into the drm-intel
> tree. Unfortunately, it seems
> On Apr 4, 2019, at 6:39 PM, Dave Airlie wrote:
>
>> On Fri, 5 Apr 2019 at 08:43, Rodrigo Vivi wrote:
>>
>>> On Thu, Apr 04, 2019 at 03:25:38PM -0700, Rodrigo Vivi wrote:
>>> From: Rodrigo Vivi
>>
>> And it seems that I don't know how to spell my own name anymore! :)
>>
>> If you decide f
Drm-tip rebuild created this function duplication in some merge resolution...
not sure where that came from or started... But Lucas had warned me yesterday
morning...
So, yesterday night I added a fix-up on drm-rerere that remove the duplication
on drm-tip... and that should be fixed by now I t
> On Sep 20, 2017, at 7:33 AM, Nagaraju, Vathsala
> wrote:
>
> Set frames before SU entry value for max resync frame count of
> dpcd register 2009, bit field 0:3.
>
> Cc: Rodrigo Vivi
> CC: Puthikorn Voravootivat
> Signed-off-by: Vathsala Nagaraju
> ---
> drivers/gpu/drm/i915/intel_psr.c |
On Wed, 2017-01-18 at 10:12 +0200, Jani Nikula wrote:
> On Tue, 17 Jan 2017, Rodrigo Vivi wrote:
> > On Mon, Jan 16, 2017 at 2:04 AM, Jani Nikula
> > wrote:
> >> On Fri, 13 Jan 2017, Rodrigo Vivi wrote:
> >>> This and all the remaining patches on this series (6,7,8 and 9) got
> >>> merged to din
Reviewed-by: Rodrigo Vivi
On Fri, 2017-01-13 at 00:31 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
> psr2 enable sequence.
> bit 12 : Program Transcoder EDP VSC DIP header with a valid setting for
> PSR2 and Set CHICKEN_TRANS_EDP(0x420
Reviewed-by: Rodrigo Vivi
On Thu, 2017-01-12 at 23:30 +0530, vathsala nagaraju wrote:
> Psr1 and psr2 are mutually exclusive,ie when psr2 is enabled,
> psr1 should be disabled.When psr2 is exited , bit 31 of reg
> PSR2_CTL must be set to 0 but currently bit 31 of SRD_CTL
> (psr1 control register)
Reviewed-by: Rodrigo Vivi
On Tue, 2017-01-10 at 12:32 +0530, vathsala nagaraju wrote:
> PSR2 is restricted to work with panel resolutions upto 3200x2000,
> move the check to intel_psr_match_conditions and fully block psr.
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Suggested-by: Rodrigo Vivi
> Sig
On Mon, 2017-01-09 at 18:26 +0530, vathsala nagaraju wrote:
> Psr1 and psr2 are mutually exclusive,ie when psr2 is enabled,
> psr1 should be disabled.When psr2 is exited , bit 31 of reg
> PSR2_CTL must be set to 0 but currently bit 31 of SRD_CTL
> (psr1 control register)is set to 0.
> Also ,PSR2_ID
upport = false; till GTC is
> implemented.
Agree!
Reviewed-by: Rodrigo Vivi
>
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Friday, January 6, 2017 11:08 PM
> To: Nagaraju, Vathsala
> Cc: dri-devel at lists.freedesktop.org; intel-gfx at lists.freedesktop.or
On Sat, 2017-01-07 at 00:28 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
> must be programmed.
> Enable bit 12 for programmable header packet.
> Enable bit 15 for Y cordinate support.
>
> v2: (Rodrigo)
> - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc
>
I was going to write the rv-b,
but something came to my mind...
In this case where y_cord_support but we don't have gtc yet, couldn't we
enable PSR1 instead?
in this case instead of return false we would do
dev_priv->psr.psr2_support = false;
what do you think/advise?
On Fri, 2017-01-06 at 23:01
On Fri, 2017-01-06 at 21:59 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
> must be programmed.
> Enable bit 12 for programmable header packet.
> Enable bit 15 for Y cordinate support.
>
> v2: (Rodrigo)
> - move CHICKEN_TRANS_EDP bit set logic right
> after setup_v
Reviewed-by: Rodrigo Vivi
On Fri, 2017-01-06 at 22:02 +0530, vathsala nagaraju wrote:
> Reports live state of PSR2 form PSR2_STATUS register.
> bit field 31:28 gives the live state of PSR2.
> It can be used to check if system is in deep sleep,
> selective update or selective update standby.
> Du
On Fri, 2017-01-06 at 22:21 +0530, vathsala nagaraju wrote:
> Psr2 is enabled only for y cordinate panels.Once GTC (global time code)
> is implemented,this restriction is removed so that psr2
> can work on panels without y cordinate support.
>
> v2: (Rodrigo)
> - Move the check to intel_psr_match_
s suggested by rodrigo and jim.
>
> v2: (Vivi Rodrigo)
> - Rename hsw_enable_source_psr* to intel_enable_source_psr*
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Signed-off-by: Vathsala Nagaraju
> Signed-off-by: Patil Deepti
> ---
> drivers/gpu/drm/i915/i
On Wed, 2016-09-07 at 15:37 +0300, Jani Nikula wrote:
> On Sun, 04 Sep 2016, Dominik Brodowski wrote:
> > Hi!
> >
> > Since commit 1c80c25fb6 (determined by git bisect, and confirmed by
> > reverting this patch on top of 9ca581b50d), the sceen on my DELL XPS 13
> > is flickering every once in a wh
Reviewed-by: Rodrigo Vivi
On Mon, 2016-08-08 at 18:24 +0200, Daniel Vetter wrote:
> Shouldn't be possible since everyone kzallocs this, but better safe
> than sorry. Random drive-by-idea really.
>
> Cc: Rodrigo Vivi
> Signed-off-by: Daniel Vetter
> ---
> Â drivers/gpu/drm/drm_irq.c | 1 +
> Â 1
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