Re: [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim

2018-03-07 Thread Ramalingam C
On Tuesday 27 February 2018 04:20 AM, Chris Wilson wrote: Quoting Ramalingam C (2018-02-26 17:12:39) DP and HDMI HDCP specifications are varying with respect to detecting the R0 and ksv_fifo availability. DP will produce CP_IRQ and set a bit for indicating the R0 and FIFO_READY status. Where

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim

2018-02-26 Thread Chris Wilson
Quoting Ramalingam C (2018-02-26 17:12:39) > DP and HDMI HDCP specifications are varying with respect to > detecting the R0 and ksv_fifo availability. > > DP will produce CP_IRQ and set a bit for indicating the R0 and > FIFO_READY status. > > Whereas HDMI will set a bit for FIFO_READY but there i