On Thu, 3 Nov 2011 15:41:25 -0700, Jesse Barnes
wrote:
> Except for VDD?? That does come on... and shouldn't be any different
> than a full power sequence as far as link training etc go...
Oh, that's a good point. Doing things in this order essentially forces
yet another full panel power
On Thu, 3 Nov 2011 13:00:11 -0700, Jesse Barnes
wrote:
> A few comments on this one (also, is it strictly required to fix your
> bug)?
I think so; the panel definitely was not happy when I turned the link
off while the panel power was on. Having the mode setting and DPMS paths
doing things in
On Tue, 1 Nov 2011 23:20:28 -0700
Keith Packard wrote:
> Make sure the sequence of operations in all three functions makes
> sense:
>
> 1) The backlight must be off unless the screen is running
> 2) The link must be running to turn the eDP panel on/off
> 3) The CPU eDP PLL must be running
On Tue, 1 Nov 2011 23:20:28 -0700
Keith Packard kei...@keithp.com wrote:
Make sure the sequence of operations in all three functions makes
sense:
1) The backlight must be off unless the screen is running
2) The link must be running to turn the eDP panel on/off
3) The CPU eDP PLL must
On Thu, 3 Nov 2011 13:00:11 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
A few comments on this one (also, is it strictly required to fix your
bug)?
I think so; the panel definitely was not happy when I turned the link
off while the panel power was on. Having the mode setting and DPMS
On Thu, 03 Nov 2011 15:30:57 -0700
Keith Packard kei...@keithp.com wrote:
On Thu, 3 Nov 2011 13:00:11 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
A few comments on this one (also, is it strictly required to fix your
bug)?
I think so; the panel definitely was not happy when I
On Thu, 3 Nov 2011 15:41:25 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
Except for VDD?? That does come on... and shouldn't be any different
than a full power sequence as far as link training etc go...
Oh, that's a good point. Doing things in this order essentially forces
yet another