[Intel-gfx] [PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

On Mon, Aug 10, 2015 at 2:21 AM, Michel Thierry wrote: > Hi, > > Thanks for the comments, > > On 8/7/2015 11:46 PM, Kristian Høgsberg wrote: >> >> On Fri, Aug 7, 2015 at 2:45 AM, Michel Thierry >> wrote: >>> >>> Gen8+ supports 48-bit virtual addresses, but some objects must always be >>> allocat

[Intel-gfx] [PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

Hi, Thanks for the comments, On 8/7/2015 11:46 PM, Kristian Høgsberg wrote: > On Fri, Aug 7, 2015 at 2:45 AM, Michel Thierry > wrote: >> Gen8+ supports 48-bit virtual addresses, but some objects must always be >> allocated inside the 32-bit address range. >> >> In specific, any resource used w

[Intel-gfx] [PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

On Fri, Aug 7, 2015 at 2:45 AM, Michel Thierry wrote: > Gen8+ supports 48-bit virtual addresses, but some objects must always be > allocated inside the 32-bit address range. > > In specific, any resource used with flat/heapless (0x-0xf000) > General State Heap or Intruction State Heap

[Intel-gfx] [PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

On Fri, Aug 7, 2015 at 2:45 AM, Michel Thierry wrote: > diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c > b/src/mesa/drivers/dri/i965/intel_batchbuffer.c > index 54081a1..ca90784 100644 > --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c > +++ b/src/mesa/drivers/dri/i965/intel_batch