On Sat, Mar 25, 2023 at 2:17 PM Hsin-Yi Wang wrote:
>
> On Fri, Mar 24, 2023 at 11:34 PM Hsin-Yi Wang wrote:
> >
> > On Fri, Mar 24, 2023 at 8:18 PM Andrzej Hajda
> > wrote:
> > >
> > >
> > >
> > > On 24.03.2023 08:29, Hsin-Yi Wang wrote:
> > > > From: xiazhengqiao
> > > >
> > > > When the i2c
On Fri, Mar 24, 2023 at 11:34 PM Hsin-Yi Wang wrote:
>
> On Fri, Mar 24, 2023 at 8:18 PM Andrzej Hajda wrote:
> >
> >
> >
> > On 24.03.2023 08:29, Hsin-Yi Wang wrote:
> > > From: xiazhengqiao
> > >
> > > When the i2c bank register (REG_BANK_SEL) is set to 1,
> > > only the registers belong to ba
On Fri, Mar 24, 2023 at 8:18 PM Andrzej Hajda wrote:
>
>
>
> On 24.03.2023 08:29, Hsin-Yi Wang wrote:
> > From: xiazhengqiao
> >
> > When the i2c bank register (REG_BANK_SEL) is set to 1,
> > only the registers belong to bank 1 can be written.
> > There will be a race condition when a process is
On 24.03.2023 08:29, Hsin-Yi Wang wrote:
From: xiazhengqiao
When the i2c bank register (REG_BANK_SEL) is set to 1,
only the registers belong to bank 1 can be written.
There will be a race condition when a process is writing
bank 0 registers while another process set the bank to 1.
Add a mute
From: xiazhengqiao
When the i2c bank register (REG_BANK_SEL) is set to 1,
only the registers belong to bank 1 can be written.
There will be a race condition when a process is writing
bank 0 registers while another process set the bank to 1.
Add a mutex to handle regmap read/write locking for
regi
