Hi Tvrtko,
> > > Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is
> > > available")
> > > added a code path which does not map via GGTT, but was still setting the
> > > ggtt write bit, and so triggering the GGTT flushing.
> > >
> > > Fix it by not setting that bit unless the
On 24/07/2023 21:16, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Jul 24, 2023 at 01:56:33PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is available")
added a code path which does not map via GGTT, but was still setting the
ggtt
g; dri-devel@lists.freedesktop.org
Cc: Ursulin, Tvrtko ; Sripada, Radhakrishna
; sta...@vger.kernel.org
Subject: [PATCH] drm/i915: Avoid GGTT flushing on non-GGTT paths of
i915_vma_pin_iomap
From: Tvrtko Ursulin
Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is
available&quo
Ursulin, Tvrtko ; Sripada, Radhakrishna
> ; sta...@vger.kernel.org
> Subject: [PATCH] drm/i915: Avoid GGTT flushing on non-GGTT paths of
> i915_vma_pin_iomap
>
> From: Tvrtko Ursulin
>
> Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is
> available"
Hi Tvrtko,
On Mon, Jul 24, 2023 at 01:56:33PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is available")
> added a code path which does not map via GGTT, but was still setting the
> ggtt write bit, and so triggering the
From: Tvrtko Ursulin
Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is available")
added a code path which does not map via GGTT, but was still setting the
ggtt write bit, and so triggering the GGTT flushing.
Fix it by not setting that bit unless the GGTT mapping path was used,
