On 12/14/2016 09:29 PM, Stefan Agner wrote:
> On 2016-12-14 00:04, Marek Vasut wrote:
>> On 12/14/2016 01:01 AM, Stefan Agner wrote:
>>> On 2016-12-08 15:38, Marek Vasut wrote:
On 12/08/2016 09:46 PM, Stefan Agner wrote:
> On 2016-12-07 18:37, Marek Vasut wrote:
>> On 12/08/2016 02:26
On 2016-12-14 00:04, Marek Vasut wrote:
> On 12/14/2016 01:01 AM, Stefan Agner wrote:
>> On 2016-12-08 15:38, Marek Vasut wrote:
>>> On 12/08/2016 09:46 PM, Stefan Agner wrote:
On 2016-12-07 18:37, Marek Vasut wrote:
> On 12/08/2016 02:26 AM, Stefan Agner wrote:
>> On 2016-12-07
On 12/14/2016 01:01 AM, Stefan Agner wrote:
> On 2016-12-08 15:38, Marek Vasut wrote:
>> On 12/08/2016 09:46 PM, Stefan Agner wrote:
>>> On 2016-12-07 18:37, Marek Vasut wrote:
On 12/08/2016 02:26 AM, Stefan Agner wrote:
> On 2016-12-07 16:59, Stefan Agner wrote:
>> On 2016-12-07
On 2016-12-08 15:38, Marek Vasut wrote:
> On 12/08/2016 09:46 PM, Stefan Agner wrote:
>> On 2016-12-07 18:37, Marek Vasut wrote:
>>> On 12/08/2016 02:26 AM, Stefan Agner wrote:
On 2016-12-07 16:59, Stefan Agner wrote:
> On 2016-12-07 16:49, Marek Vasut wrote:
>> On 12/08/2016 01:27
On 12/08/2016 09:46 PM, Stefan Agner wrote:
> On 2016-12-07 18:37, Marek Vasut wrote:
>> On 12/08/2016 02:26 AM, Stefan Agner wrote:
>>> On 2016-12-07 16:59, Stefan Agner wrote:
On 2016-12-07 16:49, Marek Vasut wrote:
> On 12/08/2016 01:27 AM, Stefan Agner wrote:
>> The DRM subsystem
On 2016-12-07 18:37, Marek Vasut wrote:
> On 12/08/2016 02:26 AM, Stefan Agner wrote:
>> On 2016-12-07 16:59, Stefan Agner wrote:
>>> On 2016-12-07 16:49, Marek Vasut wrote:
On 12/08/2016 01:27 AM, Stefan Agner wrote:
> The DRM subsystem specifies the pixel clock polarity from a
>
On 12/08/2016 02:26 AM, Stefan Agner wrote:
> On 2016-12-07 16:59, Stefan Agner wrote:
>> On 2016-12-07 16:49, Marek Vasut wrote:
>>> On 12/08/2016 01:27 AM, Stefan Agner wrote:
The DRM subsystem specifies the pixel clock polarity from a
controllers perspective:
On 12/08/2016 01:27 AM, Stefan Agner wrote:
> The DRM subsystem specifies the pixel clock polarity from a
> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
> the controller drives the data on pixel clocks falling edge.
> That is the controllers DOTCLK_POL=0 (Default is data launched
>
On 2016-12-07 16:59, Stefan Agner wrote:
> On 2016-12-07 16:49, Marek Vasut wrote:
>> On 12/08/2016 01:27 AM, Stefan Agner wrote:
>>> The DRM subsystem specifies the pixel clock polarity from a
>>> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
>>> the controller drives the data on
On 2016-12-07 16:49, Marek Vasut wrote:
> On 12/08/2016 01:27 AM, Stefan Agner wrote:
>> The DRM subsystem specifies the pixel clock polarity from a
>> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
>> the controller drives the data on pixel clocks falling edge.
>> That is the
The DRM subsystem specifies the pixel clock polarity from a
controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
the controller drives the data on pixel clocks falling edge.
That is the controllers DOTCLK_POL=0 (Default is data launched
at negative edge).
Also change the data enable logic
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