On Thu, Jun 04, 2020 at 01:19:32PM +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 22, 2020 at 5:23 PM Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Wed, Apr 15, 2020 at 07:52:28PM +0200, Jernej Škrabec wrote:
> > > Dne sreda, 15. april 2020 ob 12:42:14 CEST je Maxime Ripard napisal(a):
> > > > On Mon, Apr
On Wed, Apr 22, 2020 at 5:23 PM Maxime Ripard wrote:
>
> Hi,
>
> On Wed, Apr 15, 2020 at 07:52:28PM +0200, Jernej Škrabec wrote:
> > Dne sreda, 15. april 2020 ob 12:42:14 CEST je Maxime Ripard napisal(a):
> > > On Mon, Apr 13, 2020 at 06:09:08PM +0200, Jernej Škrabec wrote:
> > > > Dne ponedeljek,
Hi,
On Wed, Apr 15, 2020 at 07:52:28PM +0200, Jernej Škrabec wrote:
> Dne sreda, 15. april 2020 ob 12:42:14 CEST je Maxime Ripard napisal(a):
> > On Mon, Apr 13, 2020 at 06:09:08PM +0200, Jernej Škrabec wrote:
> > > Dne ponedeljek, 13. april 2020 ob 16:12:39 CEST je Chen-Yu Tsai
> napisal(a):
> >
Dne sreda, 15. april 2020 ob 12:42:14 CEST je Maxime Ripard napisal(a):
> On Mon, Apr 13, 2020 at 06:09:08PM +0200, Jernej Škrabec wrote:
> > Dne ponedeljek, 13. april 2020 ob 16:12:39 CEST je Chen-Yu Tsai
napisal(a):
> > > On Mon, Apr 13, 2020 at 6:11 PM Chen-Yu Tsai wrote:
> > > > On Mon, Apr 1
On Mon, Apr 13, 2020 at 06:09:08PM +0200, Jernej Škrabec wrote:
> Dne ponedeljek, 13. april 2020 ob 16:12:39 CEST je Chen-Yu Tsai napisal(a):
> > On Mon, Apr 13, 2020 at 6:11 PM Chen-Yu Tsai wrote:
> > > On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec
> wrote:
> > > > m divider in DDC clock regist
Dne ponedeljek, 13. april 2020 ob 16:12:39 CEST je Chen-Yu Tsai napisal(a):
> On Mon, Apr 13, 2020 at 6:11 PM Chen-Yu Tsai wrote:
> > On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec
wrote:
> > > m divider in DDC clock register is 4 bits wide. Fix that.
> > >
> > > Fixes: 9c5681011a0c ("drm/sun4i
m divider in DDC clock register is 4 bits wide. Fix that.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 2 +-
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
On Mon, Apr 13, 2020 at 6:11 PM Chen-Yu Tsai wrote:
>
> On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec
> wrote:
> >
> > m divider in DDC clock register is 4 bits wide. Fix that.
> >
> > Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
> > Signed-off-by: Jernej Skrabec
>
> Reviewed-by: Chen-Y
On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec wrote:
>
> m divider in DDC clock register is 4 bits wide. Fix that.
>
> Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
> Signed-off-by: Jernej Skrabec
Reviewed-by: Chen-Yu Tsai
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