On Thu, 17 Aug 2017 14:04:55 -0700
Eric Anholt wrote:
> VC4's DSI1 has a bug where the AXI connection is broken for 32-bit
> writes from the CPU, so we use the DMA engine to DMA 32-bit values
> into registers instead. That sleeps, so we can't do it from the top
> half.
>
> As a solution (sugges
VC4's DSI1 has a bug where the AXI connection is broken for 32-bit
writes from the CPU, so we use the DMA engine to DMA 32-bit values
into registers instead. That sleeps, so we can't do it from the top
half.
As a solution (suggested by Arnd), we can mask the IRQ in the irqchip
in the top half, an
