Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-11 Thread Sean Paul
On Wed, Oct 10, 2018 at 11:35:56AM -0700, Jeykumar Sankaran wrote: > On 2018-10-10 07:29, Sean Paul wrote: > > On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote: > > > On 2018-10-09 11:07, Sean Paul wrote: > > > > On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: >

Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-10 Thread Jeykumar Sankaran
On 2018-10-10 07:29, Sean Paul wrote: On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote: On 2018-10-09 11:07, Sean Paul wrote: > On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: > > Layer mixer/pingpong block counts and hw ctl block counts > > will not be same f

Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-10 Thread Sean Paul
On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote: > On 2018-10-09 11:07, Sean Paul wrote: > > On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: > > > Layer mixer/pingpong block counts and hw ctl block counts > > > will not be same for all the topologies (e.g. layer

Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-09 Thread Jeykumar Sankaran
On 2018-10-09 11:07, Sean Paul wrote: On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: Layer mixer/pingpong block counts and hw ctl block counts will not be same for all the topologies (e.g. layer mixer muxing to single interface) Use the encoder's split_role info to retrieve

Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-09 Thread Sean Paul
On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: > Layer mixer/pingpong block counts and hw ctl block counts > will not be same for all the topologies (e.g. layer > mixer muxing to single interface) > > Use the encoder's split_role info to retrieve the > respective control path f

Re: [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-09 Thread Jordan Crouse
On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote: > Layer mixer/pingpong block counts and hw ctl block counts > will not be same for all the topologies (e.g. layer > mixer muxing to single interface) > > Use the encoder's split_role info to retrieve the > respective control path f

[PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

2018-10-08 Thread Jeykumar Sankaran
Layer mixer/pingpong block counts and hw ctl block counts will not be same for all the topologies (e.g. layer mixer muxing to single interface) Use the encoder's split_role info to retrieve the respective control path for programming. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/dis