On Wed, Oct 03, 2018 at 08:52:06AM +0530, Jagan Teki wrote:
> On Tuesday 02 October 2018 06:50 PM, Maxime Ripard wrote:
> > On Thu, Sep 27, 2018 at 11:15:50PM +0530, Jagan Teki wrote:
> > > On Thu, Sep 27, 2018 at 10:28 PM Maxime Ripard
> > > wrote:
> > > >
> > > > On Thu, Sep 27, 2018 at 05:18:4
On Tuesday 02 October 2018 06:50 PM, Maxime Ripard wrote:
On Thu, Sep 27, 2018 at 11:15:50PM +0530, Jagan Teki wrote:
On Thu, Sep 27, 2018 at 10:28 PM Maxime Ripard
wrote:
On Thu, Sep 27, 2018 at 05:18:45PM +0530, Jagan Teki wrote:
TCON DRQ set bits for non-burst DSI mode can computed via
ho
On Thu, Sep 27, 2018 at 11:15:50PM +0530, Jagan Teki wrote:
> On Thu, Sep 27, 2018 at 10:28 PM Maxime Ripard
> wrote:
> >
> > On Thu, Sep 27, 2018 at 05:18:45PM +0530, Jagan Teki wrote:
> > > TCON DRQ set bits for non-burst DSI mode can computed via
> > > horizontal front porch instead of front po
On Thu, Sep 27, 2018 at 10:28 PM Maxime Ripard
wrote:
>
> On Thu, Sep 27, 2018 at 05:18:45PM +0530, Jagan Teki wrote:
> > TCON DRQ set bits for non-burst DSI mode can computed via
> > horizontal front porch instead of front porch + sync timings.
> >
> > Since there no documentation for TCON_DRQ_RE
TCON DRQ set bits for non-burst DSI mode can computed via
horizontal front porch instead of front porch + sync timings.
Since there no documentation for TCON_DRQ_REG(0x7c) register
this change is taken as reference from BPI-M64-bsp.
Signed-off-by: Jagan Teki
---
drivers/gpu/drm/sun4i/sun6i_mipi
On Thu, Sep 27, 2018 at 05:18:45PM +0530, Jagan Teki wrote:
> TCON DRQ set bits for non-burst DSI mode can computed via
> horizontal front porch instead of front porch + sync timings.
>
> Since there no documentation for TCON_DRQ_REG(0x7c) register
> this change is taken as reference from BPI-M64-b