On Tue, Nov 12, 2019 at 05:45:15PM +0100, Michel Dänzer wrote:
> On 2019-11-11 8:29 p.m., Bjorn Helgaas wrote:
> > From: Bjorn Helgaas
> >
> > Add definitions for these PCIe Link Control 2 register fields:
> >
> > Enter Compliance
> > Transmit Margin
> >
> > and use them in amdgpu and
On 2019-11-11 8:29 p.m., Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> Add definitions for these PCIe Link Control 2 register fields:
>
> Enter Compliance
> Transmit Margin
>
> and use them in amdgpu and radeon.
>
> NOTE: This is a functional change because "7 << 9" was apparently a
From: Bjorn Helgaas
Add definitions for these PCIe Link Control 2 register fields:
Enter Compliance
Transmit Margin
and use them in amdgpu and radeon.
NOTE: This is a functional change because "7 << 9" was apparently a typo.
That mask included the high order bit of Transmit Margin, the
