Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-05 Thread Matt Roper
On Thu, Jan 05, 2023 at 01:06:37PM +, Tvrtko Ursulin wrote: > > On 04/01/2023 17:41, Matt Roper wrote: > > On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote: > > > > > > On 03/01/2023 19:57, Matt Roper wrote: > > > > On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote:

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-05 Thread Tvrtko Ursulin
On 04/01/2023 17:41, Matt Roper wrote: On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote: On 03/01/2023 19:57, Matt Roper wrote: On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: On 19.12.2022 11:13, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-04 Thread Andrzej Hajda
On 04.01.2023 18:41, Matt Roper wrote: On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote: On 03/01/2023 19:57, Matt Roper wrote: On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: On 19.12.2022 11:13, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-04 Thread Matt Roper
On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote: > > On 03/01/2023 19:57, Matt Roper wrote: > > On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: > > > On 19.12.2022 11:13, Tvrtko Ursulin wrote: > > > > From: Tvrtko Ursulin > > > > > > > > As the logic for selecting

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-04 Thread Tvrtko Ursulin
On 03/01/2023 19:57, Matt Roper wrote: On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: On 19.12.2022 11:13, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the corresponding code become a bit unsightly.

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-04 Thread Andrzej Hajda
On 03.01.2023 20:57, Matt Roper wrote: On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: On 19.12.2022 11:13, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the corresponding code become a bit unsightly.

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2023-01-03 Thread Matt Roper
On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote: > On 19.12.2022 11:13, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > > > As the logic for selecting the register and corresponsing values grew, the > > corresponding > > > code become a bit unsightly. Consolidate by storing

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-19 Thread Andrzej Hajda
On 19.12.2022 11:13, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the corresponding code become a bit unsightly. Consolidate by storing the required values at engine init time in the engine itself, and by doing so

[PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the code become a bit unsightly. Consolidate by storing the required values at engine init time in the engine itself, and by doing so minimise the amount of invariant platform and engine checks during

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-14 Thread Andrzej Hajda
On 13.12.2022 16:22, Tvrtko Ursulin wrote: On 13/12/2022 14:52, Andrzej Hajda wrote: On 13.12.2022 13:39, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the code become a bit unsightly. Consolidate by storing the required

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-13 Thread Tvrtko Ursulin
On 13/12/2022 14:52, Andrzej Hajda wrote: On 13.12.2022 13:39, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the code become a bit unsightly. Consolidate by storing the required values at engine init time in the engine

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-13 Thread Andrzej Hajda
On 13.12.2022 13:39, Tvrtko Ursulin wrote: From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the code become a bit unsightly. Consolidate by storing the required values at engine init time in the engine itself, and by doing so minimise the amount of

[PATCH 2/2] drm/i915: Consolidate TLB invalidation flow

2022-12-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As the logic for selecting the register and corresponsing values grew, the code become a bit unsightly. Consolidate by storing the required values at engine init time in the engine itself, and by doing so minimise the amount of invariant platform and engine checks during