Re: [PATCH 2/2] drm: bridge: icn6211: Add DSI lane count DT property parsing

2022-04-19 Thread Robert Foss
On Thu, 7 Apr 2022 at 20:56, Marek Vasut wrote: > > The driver currently hard-codes DSI lane count to two, however the chip > is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT > property and program the result into DSI_CTRL register. > > Signed-off-by: Marek Vasut > Cc: Jagan

[PATCH 2/2] drm: bridge: icn6211: Add DSI lane count DT property parsing

2022-04-07 Thread Marek Vasut
The driver currently hard-codes DSI lane count to two, however the chip is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT property and program the result into DSI_CTRL register. Signed-off-by: Marek Vasut Cc: Jagan Teki Cc: Laurent Pinchart Cc: Maxime Ripard Cc: Robert