[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

2012-03-30 Thread Daniel Kurtz
It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing