On 08/09/2021 18:06, Daniel Vetter wrote:
On Thu, Sep 02, 2021 at 04:01:40PM +0100, Tvrtko Ursulin wrote:
On 02/09/2021 15:33, Daniel Vetter wrote:
On Tue, Aug 31, 2021 at 02:18:15PM +0100, Tvrtko Ursulin wrote:
On 31/08/2021 13:43, Daniel Vetter wrote:
On Tue, Aug 31, 2021 at 10:15:03AM
On Thu, Sep 02, 2021 at 04:01:40PM +0100, Tvrtko Ursulin wrote:
>
> On 02/09/2021 15:33, Daniel Vetter wrote:
> > On Tue, Aug 31, 2021 at 02:18:15PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 31/08/2021 13:43, Daniel Vetter wrote:
> > > > On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin
On 02/09/2021 15:33, Daniel Vetter wrote:
On Tue, Aug 31, 2021 at 02:18:15PM +0100, Tvrtko Ursulin wrote:
On 31/08/2021 13:43, Daniel Vetter wrote:
On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin wrote:
On 30/08/2021 09:26, Daniel Vetter wrote:
On Fri, Aug 27, 2021 at 03:44:42PM
On Tue, Aug 31, 2021 at 02:18:15PM +0100, Tvrtko Ursulin wrote:
>
> On 31/08/2021 13:43, Daniel Vetter wrote:
> > On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 30/08/2021 09:26, Daniel Vetter wrote:
> > > > On Fri, Aug 27, 2021 at 03:44:42PM +0100, Tvrtko Ursulin
On 31/08/2021 13:43, Daniel Vetter wrote:
On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin wrote:
On 30/08/2021 09:26, Daniel Vetter wrote:
On Fri, Aug 27, 2021 at 03:44:42PM +0100, Tvrtko Ursulin wrote:
On 27/08/2021 15:39, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In short
On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin wrote:
>
> On 30/08/2021 09:26, Daniel Vetter wrote:
> > On Fri, Aug 27, 2021 at 03:44:42PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 27/08/2021 15:39, Tvrtko Ursulin wrote:
> > > > From: Tvrtko Ursulin
> > > >
> > > > In short this
On 30/08/2021 09:26, Daniel Vetter wrote:
On Fri, Aug 27, 2021 at 03:44:42PM +0100, Tvrtko Ursulin wrote:
On 27/08/2021 15:39, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In short this makes i915 work for hybrid setups (DRI_PRIME=1 with Mesa)
when rendering is done on Intel dgfx and
On Fri, Aug 27, 2021 at 03:44:42PM +0100, Tvrtko Ursulin wrote:
>
> On 27/08/2021 15:39, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > In short this makes i915 work for hybrid setups (DRI_PRIME=1 with Mesa)
> > when rendering is done on Intel dgfx and scanout/composition on Intel
> >
On 27/08/2021 15:39, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In short this makes i915 work for hybrid setups (DRI_PRIME=1 with Mesa)
when rendering is done on Intel dgfx and scanout/composition on Intel
igfx.
Before this patch the driver was not quite ready for that setup, mainly
because
From: Tvrtko Ursulin
In short this makes i915 work for hybrid setups (DRI_PRIME=1 with Mesa)
when rendering is done on Intel dgfx and scanout/composition on Intel
igfx.
Before this patch the driver was not quite ready for that setup, mainly
because it was able to emit a semaphore wait between
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