Re: [PATCH v2] drm/i915: Refactor PAT/cache handling

2023-07-06 Thread Yang, Fei
> @@ -27,15 +28,8 @@ static bool gpu_write_needs_clflush(struct > drm_i915_gem_object *obj) > if (IS_DGFX(i915)) > return false; > - /* > -* For objects created by userspace through GEM_CREATE with > pat_index > -* set

Re: [PATCH v2] drm/i915: Refactor PAT/cache handling

2023-07-06 Thread Tvrtko Ursulin
On 05/07/2023 01:09, Yang, Fei wrote: >>> From: Tvrtko Ursulin >>> >>> Informal commit message for now. >>> >>> I got a bit impatient and curious to see if the idea we discussed would >>> work so sketched something out. I think it is what I was describing back >>> then.. >>> >>> So

Re: [PATCH v2] drm/i915: Refactor PAT/cache handling

2023-07-04 Thread Yang, Fei
>>> From: Tvrtko Ursulin >>> >>> Informal commit message for now. >>> >>> I got a bit impatient and curious to see if the idea we discussed would >>> work so sketched something out. I think it is what I was describing back >>> then.. >>> >>> So high level idea is to teach the driver what caching

Re: [PATCH v2] drm/i915: Refactor PAT/cache handling

2023-07-03 Thread Tvrtko Ursulin
On 30/06/2023 07:55, Yang, Fei wrote: > From: Tvrtko Ursulin > > Informal commit message for now. > > I got a bit impatient and curious to see if the idea we discussed would > work so sketched something out. I think it is what I was describing back > then.. > > So high level idea is

[PATCH v2] drm/i915: Refactor PAT/cache handling

2023-06-29 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Informal commit message for now. I got a bit impatient and curious to see if the idea we discussed would work so sketched something out. I think it is what I was describing back then.. So high level idea is to teach the driver what caching modes are hidden behind PAT