On 16/06/2023 10:08, Thomas Zimmermann wrote:
Hi
Am 15.06.23 um 19:15 schrieb Jocelyn Falempe:
On 15/06/2023 16:24, Thomas Zimmermann wrote:
Hi Jocelyn
Am 31.05.23 um 11:21 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usa
Hi
Am 15.06.23 um 19:15 schrieb Jocelyn Falempe:
On 15/06/2023 16:24, Thomas Zimmermann wrote:
Hi Jocelyn
Am 31.05.23 um 11:21 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
CPU usage drops from 100% of one core to 3
On 15/06/2023 16:24, Thomas Zimmermann wrote:
Hi Jocelyn
Am 31.05.23 um 11:21 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
CPU usage drops from 100% of one core to 3% when continuously
refreshing the screen.
I trie
Hi Jocelyn
Am 31.05.23 um 11:21 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
CPU usage drops from 100% of one core to 3% when continuously
refreshing the screen.
I tried your patchset on a HP Proliant server with a
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
CPU usage drops from 100% of one core to 3% when continuously
refreshing the screen.
The primary DMA is used to send commands (register write), and
the secondary DMA to send the pixel data.
It uses t