[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-29 Thread Ying Liu
On Mon, Aug 29, 2016 at 5:46 PM, Philipp Zabel wrote: > Am Montag, den 29.08.2016, 17:36 +0800 schrieb Ying Liu: >> On Mon, Aug 29, 2016 at 4:46 PM, Philipp Zabel >> wrote: >> > Am Freitag, den 26.08.2016, 15:30 +0800 schrieb Liu Ying: >> >> According to basic tests, it looks there is no issue

[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-29 Thread Ying Liu
On Mon, Aug 29, 2016 at 4:46 PM, Philipp Zabel wrote: > Am Freitag, den 26.08.2016, 15:30 +0800 schrieb Liu Ying: >> According to basic tests, it looks there is no issue if we don't wait for >> DMFC FIFO to clear when disabling DMFC channel. NXP BSP doesn't do that, >> either. This patch is nee

[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-29 Thread Philipp Zabel
Am Montag, den 29.08.2016, 17:57 +0800 schrieb Ying Liu: > On Mon, Aug 29, 2016 at 5:46 PM, Philipp Zabel > wrote: > > Am Montag, den 29.08.2016, 17:36 +0800 schrieb Ying Liu: > >> On Mon, Aug 29, 2016 at 4:46 PM, Philipp Zabel > >> wrote: > >> > Am Freitag, den 26.08.2016, 15:30 +0800 schrieb

[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-29 Thread Philipp Zabel
Am Montag, den 29.08.2016, 17:36 +0800 schrieb Ying Liu: > On Mon, Aug 29, 2016 at 4:46 PM, Philipp Zabel > wrote: > > Am Freitag, den 26.08.2016, 15:30 +0800 schrieb Liu Ying: > >> According to basic tests, it looks there is no issue if we don't wait for > >> DMFC FIFO to clear when disabling DM

[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-29 Thread Philipp Zabel
Am Freitag, den 26.08.2016, 15:30 +0800 schrieb Liu Ying: > According to basic tests, it looks there is no issue if we don't wait for > DMFC FIFO to clear when disabling DMFC channel. NXP BSP doesn't do that, > either. This patch is needed to avoid the annoying warning caused by a > timeout on wa

[PATCH v4 4/7] gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel

2016-08-26 Thread Liu Ying
According to basic tests, it looks there is no issue if we don't wait for DMFC FIFO to clear when disabling DMFC channel. NXP BSP doesn't do that, either. This patch is needed to avoid the annoying warning caused by a timeout on waiting for the FIFO to clear after we add the new DRM_PLANE_COMMIT_