On Wednesday, 19 January 2022 07:40:22 CET H. Nikolaus Schaller wrote:
> Hi Paul,
>
> > Am 18.01.2022 um 23:59 schrieb Paul Boddie :
> >
> > On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
> >>
> >> Why is this JZ_LCD_OSDC_ALPHAEN bit needed now? I remember it working
> >> fine
Hi Paul,
> Am 18.01.2022 um 23:59 schrieb Paul Boddie :
>
> On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>>
>> Not at all. If the clock is disabled, the LCD controller is disabled,
>> so all the registers read zero, this makes sense. You can only read the
>> registers when the
On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>
> Not at all. If the clock is disabled, the LCD controller is disabled,
> so all the registers read zero, this makes sense. You can only read the
> registers when the clock is enabled. On some SoCs, reading disabled
> registers can
Hi Paul,
> Am 18.01.2022 um 17:58 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> Le mar., janv. 18 2022 at 15:50:01 +0100, H. Nikolaus Schaller
> a écrit :
>> Hi Paul,
>> any insights on the JZ_REG_LCD_OSDC issue below?
>
> Sorry, I missed your previous email. I blame the holidays ;)
No
Hi Nikolaus,
Le mar., janv. 18 2022 at 15:50:01 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
any insights on the JZ_REG_LCD_OSDC issue below?
Sorry, I missed your previous email. I blame the holidays ;)
There is a second, unrelated issue with the introduction of
"drm/bridge:
Hi Paul,
any insights on the JZ_REG_LCD_OSDC issue below?
There is a second, unrelated issue with the introduction of
"drm/bridge: display-connector: implement bus fmts callbacks"
which breaks bus format negotiations.
These are the two last unsolved issues to submit a fully working driver.
>
Hi Paul,
sorry to go back here...
DDC power control is working now (and I now understand that a typo in my
work-in-progress
ci20.dts had switched the DDC SDA to active "1" without powering DDC and that
may be beyond
what the monitor wanted to see and therefore DDC edid isn't reliable any
Hi Nikolaus,
Le lun., nov. 8 2021 at 19:33:48 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
Am 08.11.2021 um 18:49 schrieb Paul Cercueil :
Variant 4: the variant #2 without the changes to the DTSI files.
Hm. If there is no cache and we can safely remove tight boundary
checking (by
Hi Paul,
> Am 08.11.2021 um 18:49 schrieb Paul Cercueil :
>
>>> Variant 4: the variant #2 without the changes to the DTSI files.
>> Hm. If there is no cache and we can safely remove tight boundary checking
>> (by JZ_REG_LCD_SIZE1) for jz4725/40/70 (by not fixing DTSI) why do we still
>> need
Hi,
Le lun., nov. 8 2021 at 18:22:58 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
Am 08.11.2021 um 17:30 schrieb Paul Cercueil :
Hi,
Le lun., nov. 8 2021 at 16:29:11 +0100, H. Nikolaus Schaller
a écrit :
Bnjour Paul,
Am 08.11.2021 um 13:20 schrieb Paul Cercueil
:
Hi,
e.g.
Hi Paul,
> Am 08.11.2021 um 17:30 schrieb Paul Cercueil :
>
> Hi,
>
> Le lun., nov. 8 2021 at 16:29:11 +0100, H. Nikolaus Schaller
> a écrit :
>> Bnjour Paul,
>>> Am 08.11.2021 um 13:20 schrieb Paul Cercueil :
>>> Hi,
e.g. jz4770.dtsi:
lcd: lcd-controller@1305 {
Hi,
Le lun., nov. 8 2021 at 16:29:11 +0100, H. Nikolaus Schaller
a écrit :
Bnjour Paul,
Am 08.11.2021 um 13:20 schrieb Paul Cercueil :
Hi,
Le lun., nov. 8 2021 at 11:52:20 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
Am 08.11.2021 um 10:37 schrieb Paul Cercueil
:
Well, it was
Bnjour Paul,
> Am 08.11.2021 um 13:20 schrieb Paul Cercueil :
>
> Hi,
>
> Le lun., nov. 8 2021 at 11:52:20 +0100, H. Nikolaus Schaller
> a écrit :
>> Hi Paul,
Am 08.11.2021 um 10:37 schrieb Paul Cercueil :
Well, it was atomic: "add jz4780+hdmi functionality" or not. Now we
Hi,
Le lun., nov. 8 2021 at 11:52:20 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
Am 08.11.2021 um 10:37 schrieb Paul Cercueil
:
Well, it was atomic: "add jz4780+hdmi functionality" or not. Now
we separate into "preparation for adding jz4780" and "really
adding". Yes, you can split
Hi Paul,
>> Am 08.11.2021 um 10:37 schrieb Paul Cercueil :
>>
>> Well, it was atomic: "add jz4780+hdmi functionality" or not. Now we separate
>> into "preparation for adding jz4780" and "really adding". Yes, you can split
>> atoms into quarks...
>
> And that's how it should be done. Lots of
Hi Nikolaus,
Le dim., nov. 7 2021 at 21:25:38 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
Am 07.11.2021 um 20:01 schrieb Paul Cercueil :
Hi Nikolaus,
Le dim., nov. 7 2021 at 14:41:18 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
sorry for the delay in getting back to this, but
Hi Paul,
> Am 07.11.2021 um 20:01 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> Le dim., nov. 7 2021 at 14:41:18 +0100, H. Nikolaus Schaller
> a écrit :
>> Hi Paul,
>> sorry for the delay in getting back to this, but I was distracted by more
>> urgent topics.
>>> Am 05.10.2021 um 22:22
Hi Nikolaus,
Le dim., nov. 7 2021 at 14:41:18 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
sorry for the delay in getting back to this, but I was distracted by
more urgent topics.
Am 05.10.2021 um 22:22 schrieb Paul Cercueil :
Hi Nikolaus,
Le mar., oct. 5 2021 at 14:29:14 +0200, H.
Hi Paul,
sorry for the delay in getting back to this, but I was distracted by more
urgent topics.
> Am 05.10.2021 um 22:22 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> Le mar., oct. 5 2021 at 14:29:14 +0200, H. Nikolaus Schaller
> a écrit :
>> From: Paul Boddie
>> Add support for the LCD
Hi Nikolaus,
Le mar., oct. 5 2021 at 14:29:14 +0200, H. Nikolaus Schaller
a écrit :
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Tested on MIPS Creator
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Tested on MIPS Creator CI20 board.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by:
21 matches
Mail list logo
