Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Tony, > Am 03.05.2020 um 17:01 schrieb Tony Lindgren : > > * Paul Cercueil [200503 14:19]: >> You have a new SoC with a SGX, and you only need to enable one clock to get >> it to work. So you create a devicetree node which receives only one clock. >> >> Turns out, that the bootloader was

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

> Am 05.05.2020 um 17:53 schrieb Rob Herring : > > On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote: >> The Imagination PVR/SGX GPU is part of several SoC from >> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, >> Allwinner A83 and others. >> >> With this

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Paul & Paul, > Am 03.05.2020 um 18:41 schrieb H. Nikolaus Schaller : > > Hi Paul and Paul, > >> Am 03.05.2020 um 16:18 schrieb Paul Cercueil : >> >> >> >> Le dim. 3 mai 2020 à 15:31, H. Nikolaus Schaller a >> écrit : >>> Hi Paul, Am 03.05.2020 um 14:52 schrieb Paul Cercueil :

Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs

On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote: > The Imagination PVR/SGX GPU is part of several SoC from > multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, > Allwinner A83 and others. > > With this binding, we describe how the SGX processor is > interfaced to

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Le dim. 3 mai 2020 à 15:31, H. Nikolaus Schaller a écrit : Hi Paul, Am 03.05.2020 um 14:52 schrieb Paul Cercueil : It's possible to forbid the presence of the 'clocks' property on some implementations, and require it on others. To be precise we have to specify the exact number of

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Paul, > Am 03.05.2020 um 14:52 schrieb Paul Cercueil : > >>> It's possible to forbid the presence of the 'clocks' property on some >>> implementations, and require it on others. >> To be precise we have to specify the exact number of clocks (between 0 and >> 4) for every architecture. >>

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Paul and Paul, > Am 03.05.2020 um 16:18 schrieb Paul Cercueil : > > > > Le dim. 3 mai 2020 à 15:31, H. Nikolaus Schaller a écrit > : >> Hi Paul, >>> Am 03.05.2020 um 14:52 schrieb Paul Cercueil : > It's possible to forbid the presence of the 'clocks' property on some >

Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs

* Paul Cercueil [200503 14:19]: > You have a new SoC with a SGX, and you only need to enable one clock to get > it to work. So you create a devicetree node which receives only one clock. > > Turns out, that the bootloader was enabling the other 3 clocks, and since > the last release, it doesn't

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Paul, > Am 26.04.2020 um 15:11 schrieb Paul Cercueil : > > Hi Nikolaus, > > Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller a > écrit : >> The Imagination PVR/SGX GPU is part of several SoC from >> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, >> Allwinner A83 and

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Nikolaus, Le sam. 2 mai 2020 à 22:26, H. Nikolaus Schaller a écrit : Hi Paul, Am 26.04.2020 um 15:11 schrieb Paul Cercueil : Hi Nikolaus, Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller a écrit : The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g.

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Nikolaus, On 24.04.20 22:34, H. Nikolaus Schaller wrote: The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others. With this binding, we describe how the SGX processor is interfaced to the SoC (registers

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Philipp, > Am 26.04.2020 um 21:36 schrieb Philipp Rossak : > > Hi Nikolaus, > > On 24.04.20 22:34, H. Nikolaus Schaller wrote: >> The Imagination PVR/SGX GPU is part of several SoC from >> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, >> Allwinner A83 and others. >> With

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

Hi Nikolaus, Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller a écrit : The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others. With this binding, we describe how the SGX processor is interfaced to

Re: [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

> Am 24.04.2020 um 22:34 schrieb H. Nikolaus Schaller : > > The Imagination PVR/SGX GPU is part of several SoC from > multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, > Allwinner A83 and others. > > With this binding, we describe how the SGX processor is > interfaced to the SoC

[PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs

The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others. With this binding, we describe how the SGX processor is interfaced to the SoC (registers and interrupt). The interface also consists of clocks, reset,