On Tue, May 29, 2012 at 5:19 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, May 21, 2012 at 11:27 AM, Steven Newbury st...@snewbury.org.uk
wrote:
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On 18/05/12 10:08, Yinghai Lu wrote:
On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu
On Tue, May 29, 2012 at 5:19 PM, Bjorn Helgaas wrote:
> On Mon, May 21, 2012 at 11:27 AM, Steven Newbury
> wrote:
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>>
>> On 18/05/12 10:08, Yinghai Lu wrote:
>>> On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu
>>> wrote:
On Thu, May 17, 2012
On Mon, May 21, 2012 at 11:27 AM, Steven Newbury st...@snewbury.org.uk wrote:
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On 18/05/12 10:08, Yinghai Lu wrote:
On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu ying...@kernel.org
wrote:
On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu
On Mon, May 21, 2012 at 11:27 AM, Steven Newbury
wrote:
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>
> On 18/05/12 10:08, Yinghai Lu wrote:
>> On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu
>> wrote:
>>> On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu
>>> wrote:
On Thu, May 17, 2012 at
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On 18/05/12 10:08, Yinghai Lu wrote:
> On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu
> wrote:
>> On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu
>> wrote:
>>> On Thu, May 17, 2012 at 5:34 AM, Steven Newbury
>>> wrote:
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On 18/05/12 10:08, Yinghai Lu wrote:
On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu ying...@kernel.org
wrote:
On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu ying...@kernel.org
wrote:
On Thu, May 17, 2012 at 5:34 AM, Steven Newbury
On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu wrote:
> On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu wrote:
>> On Thu, May 17, 2012 at 5:34 AM, Steven Newbury
>> wrote:
>>> -BEGIN PGP SIGNED MESSAGE-
>>> Strange, the busn branch is merged with for-pci-res-alloc, but for
>>> some reason it
On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu wrote:
> On Thu, May 17, 2012 at 5:34 AM, Steven Newbury
> wrote:
>> -BEGIN PGP SIGNED MESSAGE-
>> Strange, the busn branch is merged with for-pci-res-alloc, but for
>> some reason it isn't working. ?Only the bridge is detected, not the
>>
On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu ying...@kernel.org wrote:
On Thu, May 17, 2012 at 5:34 AM, Steven Newbury st...@snewbury.org.uk wrote:
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Strange, the busn branch is merged with for-pci-res-alloc, but for
some reason it isn't working. Only the
On Fri, May 18, 2012 at 12:45 AM, Yinghai Lu ying...@kernel.org wrote:
On Thu, May 17, 2012 at 9:36 AM, Yinghai Lu ying...@kernel.org wrote:
On Thu, May 17, 2012 at 5:34 AM, Steven Newbury st...@snewbury.org.uk
wrote:
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Strange, the busn branch is merged with
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On 17/05/12 13:27, Steven Newbury wrote:
> On 15/05/12 18:42, Yinghai Lu wrote:
>> On Tue, May 15, 2012 at 2:54 AM, Steven Newbury
>> wrote:
>
>>> I'll get re-synced back up, and if they're still relevant give
>>> the patches a test. Is there an
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On 15/05/12 18:42, Yinghai Lu wrote:
> On Tue, May 15, 2012 at 2:54 AM, Steven Newbury
> wrote:
>
>> I'll get re-synced back up, and if they're still relevant give
>> the patches a test. Is there an updated branch I should work
>> from?
>
>
On Thu, May 17, 2012 at 5:34 AM, Steven Newbury
wrote:
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> Strange, the busn branch is merged with for-pci-res-alloc, but for
> some reason it isn't working. ?Only the bridge is detected, not the
> devices behind it.
Can you post the boot log ? maybe recently
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On 15/05/12 18:42, Yinghai Lu wrote:
On Tue, May 15, 2012 at 2:54 AM, Steven Newbury
st...@snewbury.org.uk wrote:
I'll get re-synced back up, and if they're still relevant give
the patches a test. Is there an updated branch I should work
from?
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On 17/05/12 13:27, Steven Newbury wrote:
On 15/05/12 18:42, Yinghai Lu wrote:
On Tue, May 15, 2012 at 2:54 AM, Steven Newbury
st...@snewbury.org.uk wrote:
I'll get re-synced back up, and if they're still relevant give
the patches a test. Is
On Thu, May 17, 2012 at 5:34 AM, Steven Newbury st...@snewbury.org.uk wrote:
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Strange, the busn branch is merged with for-pci-res-alloc, but for
some reason it isn't working. Only the bridge is detected, not the
devices behind it.
Can you post the boot log ?
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On 16/04/12 18:29, Yinghai Lu wrote:
> On Sun, Apr 15, 2012 at 11:54 PM, Yinghai Lu
> wrote:
>> On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu
>> wrote:
3. use pci_bus_allocate_resource in drm/radeon driver ...
===> but that could fail. so
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On 16/04/12 18:29, Yinghai Lu wrote:
On Sun, Apr 15, 2012 at 11:54 PM, Yinghai Lu ying...@kernel.org
wrote:
On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu ying...@kernel.org
wrote:
3. use pci_bus_allocate_resource in drm/radeon driver ...
=== but
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On 16/04/12 18:29, Yinghai Lu wrote:
> On Sun, Apr 15, 2012 at 11:54 PM, Yinghai Lu
> wrote:
>> On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu
>> wrote:
3. use pci_bus_allocate_resource in drm/radeon driver ...
===> but that could fail. so
On Sun, Apr 15, 2012 at 11:54 PM, Yinghai Lu wrote:
> On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu wrote:
>>> 3. use pci_bus_allocate_resource in drm/radeon driver ... ===> but
>>> that could fail.
>>> ? so could hack it like a. disable bar 0x10 and steal BAR address,
>>> then set 0x30 to that
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On 16/04/12 07:54, Yinghai Lu wrote:
> On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu
> wrote:
>>> 3. use pci_bus_allocate_resource in drm/radeon driver ... ===>
>>> but that could fail. so could hack it like a. disable bar 0x10
>>> and steal BAR
On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu wrote:
>> 3. use pci_bus_allocate_resource in drm/radeon driver ... ===> but
>> that could fail.
>> ? so could hack it like a. disable bar 0x10 and steal BAR address,
>> then set 0x30 to that address then copy ROM to ram.
>> ? after that, disable rom
On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu ying...@kernel.org wrote:
3. use pci_bus_allocate_resource in drm/radeon driver ... === but
that could fail.
so could hack it like a. disable bar 0x10 and steal BAR address,
then set 0x30 to that address then copy ROM to ram.
after that, disable
On Sun, Apr 15, 2012 at 11:54 PM, Yinghai Lu ying...@kernel.org wrote:
On Sun, Apr 15, 2012 at 1:06 PM, Yinghai Lu ying...@kernel.org wrote:
3. use pci_bus_allocate_resource in drm/radeon driver ... === but
that could fail.
so could hack it like a. disable bar 0x10 and steal BAR address,
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On 15/04/12 18:25, Steven Newbury wrote:
> On 15/04/12 12:37, Steven Newbury wrote:
>> On 15/04/12 11:20, Steven Newbury wrote:
>>> On 14/04/12 21:48, Yinghai Lu wrote:
>
> [snip]
>
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
>
>>
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On 15/04/12 12:37, Steven Newbury wrote:
> On 15/04/12 11:20, Steven Newbury wrote:
>> On 14/04/12 21:48, Yinghai Lu wrote:
[snip]
>>> On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
>
> pci :03:08.0: BAR 15: can't assign mem pref
On Sun, Apr 15, 2012 at 1:05 PM, Yinghai Lu wrote:
> On Sun, Apr 15, 2012 at 10:31 AM, Steven Newbury
> wrote:
pci :03:08.0: BAR 15: can't assign mem pref (size
0x1800)
>>> Ah! Not enough space for the bridge window!:(
>>>
>>>
>> please append
On Sun, Apr 15, 2012 at 10:31 AM, Steven Newbury
wrote:
>>>
>>> pci :03:08.0: BAR 15: can't assign mem pref (size
>>> 0x1800)
>> Ah! Not enough space for the bridge window!:(
>>
>>
> please append pci=norom ...
>>
That worked. ?Except of course the radeon
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On 15/04/12 11:20, Steven Newbury wrote:
> On 14/04/12 21:48, Yinghai Lu wrote:
>> On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
>> wrote:
>>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>>
>>> On 14/04/12 20:08, Steven Newbury wrote:
On
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On 15/04/12 04:21, Yinghai Lu wrote:
> On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury
> wrote:
>> I've created a new quirk utilising an extra PCI resource flag to
>> force reallocation of the resource. It's the first approach I've
>> had any
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On 14/04/12 21:48, Yinghai Lu wrote:
> On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
> wrote:
>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>
>> On 14/04/12 20:08, Steven Newbury wrote:
>>> On 14/04/12 19:42, Steven Newbury wrote:
On
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On 14/04/12 21:48, Yinghai Lu wrote:
> On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
> wrote:
>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>
>> On 14/04/12 20:08, Steven Newbury wrote:
>>> On 14/04/12 19:42, Steven Newbury wrote:
On
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On 15/04/12 04:21, Yinghai Lu wrote:
> On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury
> wrote:
>> I've created a new quirk utilising an extra PCI resource flag to
>> force reallocation of the resource. It's the first approach I've
>> had any
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On 15/04/12 04:21, Yinghai Lu wrote:
On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury
st...@snewbury.org.uk wrote:
I've created a new quirk utilising an extra PCI resource flag to
force reallocation of the resource. It's the first approach I've
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On 14/04/12 21:48, Yinghai Lu wrote:
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
st...@snewbury.org.uk wrote:
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On 14/04/12 20:08, Steven Newbury wrote:
On 14/04/12 19:42, Steven Newbury wrote:
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On 14/04/12 21:48, Yinghai Lu wrote:
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
st...@snewbury.org.uk wrote:
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On 14/04/12 20:08, Steven Newbury wrote:
On 14/04/12 19:42, Steven Newbury wrote:
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On 15/04/12 04:21, Yinghai Lu wrote:
On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury
st...@snewbury.org.uk wrote:
I've created a new quirk utilising an extra PCI resource flag to
force reallocation of the resource. It's the first approach I've
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On 15/04/12 11:20, Steven Newbury wrote:
On 14/04/12 21:48, Yinghai Lu wrote:
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
st...@snewbury.org.uk wrote:
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On 14/04/12 20:08, Steven Newbury wrote:
On Sun, Apr 15, 2012 at 10:31 AM, Steven Newbury st...@snewbury.org.uk wrote:
pci :03:08.0: BAR 15: can't assign mem pref (size
0x1800)
Ah! Not enough space for the bridge window!:(
please append pci=norom ...
That worked. Except of course the radeon driver can't POST the
card
On Sun, Apr 15, 2012 at 1:05 PM, Yinghai Lu ying...@kernel.org wrote:
On Sun, Apr 15, 2012 at 10:31 AM, Steven Newbury st...@snewbury.org.uk
wrote:
pci :03:08.0: BAR 15: can't assign mem pref (size
0x1800)
Ah! Not enough space for the bridge window!:(
please append pci=norom ...
On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury
wrote:
> I've created a new quirk utilising an extra PCI resource flag to force
> reallocation of the resource. ?It's the first approach I've had any
> success at. ?It does work. ?Only "Intel Page Flush" now gets allocated
> @0xe000!
Maybe we
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On 14/04/12 20:08, Steven Newbury wrote:
> On 14/04/12 19:42, Steven Newbury wrote:
>> On 14/04/12 19:05, Steven Newbury wrote:
>>> On 14/04/12 18:37, Steven Newbury wrote:
On 12/04/12 17:40, Steven Newbury wrote:
> On Thu, 12 Apr 2012,
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On 14/04/12 19:42, Steven Newbury wrote:
> On 14/04/12 19:05, Steven Newbury wrote:
>> On 14/04/12 18:37, Steven Newbury wrote:
>>> On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
wrote:
>
> On
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On 14/04/12 19:05, Steven Newbury wrote:
> On 14/04/12 18:37, Steven Newbury wrote:
>> On 12/04/12 17:40, Steven Newbury wrote:
>>> On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
>>> wrote:
>
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
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On 14/04/12 18:37, Steven Newbury wrote:
> On 12/04/12 17:40, Steven Newbury wrote:
>> On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
>> wrote:
>
>>> On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
>>> wrote:
Thanks, that fixed it! :) I had a
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On 12/04/12 17:40, Steven Newbury wrote:
> On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
> wrote:
>
>> On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
>> wrote:
>>> Thanks, that fixed it! :) I had a similar patch I've been
>>> working on but I had
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury
wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 14/04/12 20:08, Steven Newbury wrote:
>> On 14/04/12 19:42, Steven Newbury wrote:
>>> On 14/04/12 19:05, Steven Newbury wrote:
On 14/04/12 18:37, Steven Newbury wrote:
> On
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On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu ying...@kernel.org
wrote:
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
st...@snewbury.org.uk wrote:
Thanks, that fixed it! :) I had a similar patch I've
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On 14/04/12 18:37, Steven Newbury wrote:
On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
ying...@kernel.org wrote:
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
st...@snewbury.org.uk wrote:
Thanks,
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On 14/04/12 19:05, Steven Newbury wrote:
On 14/04/12 18:37, Steven Newbury wrote:
On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
ying...@kernel.org wrote:
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
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On 14/04/12 19:42, Steven Newbury wrote:
On 14/04/12 19:05, Steven Newbury wrote:
On 14/04/12 18:37, Steven Newbury wrote:
On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu
ying...@kernel.org wrote:
On
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On 14/04/12 20:08, Steven Newbury wrote:
On 14/04/12 19:42, Steven Newbury wrote:
On 14/04/12 19:05, Steven Newbury wrote:
On 14/04/12 18:37, Steven Newbury wrote:
On 12/04/12 17:40, Steven Newbury wrote:
On Thu, 12 Apr 2012, 17:07:33 BST,
On Sat, Apr 14, 2012 at 12:21 PM, Steven Newbury st...@snewbury.org.uk wrote:
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On 14/04/12 20:08, Steven Newbury wrote:
On 14/04/12 19:42, Steven Newbury wrote:
On 14/04/12 19:05, Steven Newbury wrote:
On 14/04/12 18:37, Steven Newbury wrote:
On
On Sat, Apr 14, 2012 at 10:37 AM, Steven Newbury st...@snewbury.org.uk wrote:
I've created a new quirk utilising an extra PCI resource flag to force
reallocation of the resource. It's the first approach I've had any
success at. It does work. Only Intel Page Flush now gets allocated
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On 13/04/12 19:12, Steven Newbury wrote:
> On 13/04/12 18:38, Steven Newbury wrote:
>> On 13/04/12 17:17, Yinghai Lu wrote:
> Looks like either a btrfs regression or bad interaction
> with for-pci-res-alloc. Oops attached.
Just hit the
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On 13/04/12 18:38, Steven Newbury wrote:
> On 13/04/12 17:17, Yinghai Lu wrote:
Looks like either a btrfs regression or bad interaction with
for-pci-res-alloc. Oops attached.
>>> Just hit the same oops on the rc1+for-pci-res-alloc kernel I
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On 13/04/12 17:17, Yinghai Lu wrote:
>>> Looks like either a btrfs regression or bad interaction with
>>> for-pci-res-alloc. Oops attached.
>> Just hit the same oops on the rc1+for-pci-res-alloc kernel I
>> tried earlier so it's not definitely
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On 13/04/12 17:17, Yinghai Lu wrote:
>>> Looks like either a btrfs regression or bad interaction with
>>> for-pci-res-alloc. Oops attached.
>> Just hit the same oops on the rc1+for-pci-res-alloc kernel I
>> tried earlier so it's not definitely
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On 13/04/12 16:23, Steven Newbury wrote:
> On 13/04/12 15:19, Steven Newbury wrote:
>> On 13/04/12 15:13, Daniel Vetter wrote:
>>> On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury
>>> wrote:
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On 13/04/12 15:19, Steven Newbury wrote:
> On 13/04/12 15:13, Daniel Vetter wrote:
>> On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury wrote:
>>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>>
>>> On 13/04/12 14:52, Steven Newbury wrote:
On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 13/04/12 14:52, Steven Newbury wrote:
> > On Fri, 13 Apr 2012, 14:26:19 BST, Steven Newbury
> > wrote:
> >
> >> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
> >>
> >> On
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On 13/04/12 15:13, Daniel Vetter wrote:
> On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury wrote:
>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>
>> On 13/04/12 14:52, Steven Newbury wrote:
>>> On Fri, 13 Apr 2012, 14:26:19 BST, Steven
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On 13/04/12 14:52, Steven Newbury wrote:
> On Fri, 13 Apr 2012, 14:26:19 BST, Steven Newbury
> wrote:
>
>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>
>> On 13/04/12 13:49, Steven Newbury wrote:
>>> On 13/04/12 12:58, Steven Newbury wrote:
>>>
On Fri, 13 Apr 2012, 14:26:19 BST, Steven Newbury
wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 13/04/12 13:49, Steven Newbury wrote:
> > On 13/04/12 12:58, Steven Newbury wrote:
> >
> > > > It's not stable, crashes soon after GMA comes up. (Could be
> > > > unrelated
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On 13/04/12 13:49, Steven Newbury wrote:
> On 13/04/12 12:58, Steven Newbury wrote:
>
>>> It's not stable, crashes soon after GMA comes up. (Could be
>>> unrelated breakage in linus/master? Probably not but I will
>>> verify.) I noticed the high
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On 13/04/12 12:58, Steven Newbury wrote:
>> It's not stable, crashes soon after GMA comes up. (Could be
>> unrelated breakage in linus/master? Probably not but I will
>> verify.) I noticed the high allocations are occuring from the
>> top of
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On 13/04/12 12:45, Steven Newbury wrote:
> On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu
> wrote:
>
>> On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury
>> wrote:
>
> It would be useful to preserve as much low PCI memory
> address space
On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu wrote:
> On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury
> wrote:
> > > >
> > > > It would be useful to preserve as much low PCI memory address
> > > > space as possible for hotplug devices (like my Radeon), but the
> > > > other problem is small
On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu wrote:
> On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury
> wrote:
> > > >
> > > > It would be useful to preserve as much low PCI memory address
> > > > space as possible for hotplug devices (like my Radeon), but the
> > > > other problem is small
>> Looks like either a btrfs regression or bad interaction with
>> for-pci-res-alloc. ?Oops attached.
> Just hit the same oops on the rc1+for-pci-res-alloc kernel I tried
> earlier so it's not definitely something new in the btrfs code. ?Seems
> like it's a 64/32bit pointer issue??
On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury
wrote:
>> >
>> > It would be useful to preserve as much low PCI memory address space as
>> > possible for hotplug devices (like my Radeon), but the other problem
>> > is small regions get allocated at the bottom, resulting in the
>> > inability to
On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu ying...@kernel.org wrote:
On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury st...@snewbury.org.uk
wrote:
It would be useful to preserve as much low PCI memory address
space as possible for hotplug devices (like my Radeon), but the
On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu ying...@kernel.org wrote:
On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury st...@snewbury.org.uk
wrote:
It would be useful to preserve as much low PCI memory address
space as possible for hotplug devices (like my Radeon), but the
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On 13/04/12 12:45, Steven Newbury wrote:
On Fri, 13 Apr 2012, 09:26:55 BST, Yinghai Lu ying...@kernel.org
wrote:
On Thu, Apr 12, 2012 at 9:40 AM, Steven Newbury
st...@snewbury.org.uk wrote:
It would be useful to preserve as much low PCI
On Fri, 13 Apr 2012, 14:26:19 BST, Steven Newbury st...@snewbury.org.uk wrote:
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On 13/04/12 13:49, Steven Newbury wrote:
On 13/04/12 12:58, Steven Newbury wrote:
It's not stable, crashes soon after GMA comes up. (Could be
unrelated
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On 13/04/12 15:13, Daniel Vetter wrote:
On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury wrote:
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On 13/04/12 14:52, Steven Newbury wrote:
On Fri, 13 Apr 2012, 14:26:19 BST, Steven Newbury
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On 13/04/12 15:19, Steven Newbury wrote:
On 13/04/12 15:13, Daniel Vetter wrote:
On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury wrote:
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On 13/04/12 14:52, Steven Newbury wrote:
On Fri, 13
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On 13/04/12 16:23, Steven Newbury wrote:
On 13/04/12 15:19, Steven Newbury wrote:
On 13/04/12 15:13, Daniel Vetter wrote:
On Fri, Apr 13, 2012 at 03:08:36PM +0100, Steven Newbury
wrote:
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On 13/04/12
Looks like either a btrfs regression or bad interaction with
for-pci-res-alloc. Oops attached.
Just hit the same oops on the rc1+for-pci-res-alloc kernel I tried
earlier so it's not definitely something new in the btrfs code. Seems
like it's a 64/32bit pointer issue??
for-pci-res-alloc
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On 13/04/12 17:17, Yinghai Lu wrote:
Looks like either a btrfs regression or bad interaction with
for-pci-res-alloc. Oops attached.
Just hit the same oops on the rc1+for-pci-res-alloc kernel I
tried earlier so it's not definitely something new
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On 13/04/12 17:17, Yinghai Lu wrote:
Looks like either a btrfs regression or bad interaction with
for-pci-res-alloc. Oops attached.
Just hit the same oops on the rc1+for-pci-res-alloc kernel I
tried earlier so it's not definitely something new
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On 13/04/12 18:38, Steven Newbury wrote:
On 13/04/12 17:17, Yinghai Lu wrote:
Looks like either a btrfs regression or bad interaction with
for-pci-res-alloc. Oops attached.
Just hit the same oops on the rc1+for-pci-res-alloc kernel I
tried
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On 13/04/12 19:12, Steven Newbury wrote:
On 13/04/12 18:38, Steven Newbury wrote:
On 13/04/12 17:17, Yinghai Lu wrote:
Looks like either a btrfs regression or bad interaction
with for-pci-res-alloc. Oops attached.
Just hit the same oops on the
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu wrote:
> On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
> wrote:
> > Thanks, that fixed it! :) I had a similar patch I've been working on
> > but I had my fix in the wrong place!
> >
> > In the working case, initially the BIOS has set GMA to
On Thu, 12 Apr 2012, 12:22:34 BST, Steven Newbury
wrote:
> I've attempted to modify probe.c to disable 64-bit BARs not allocated
> above 4G so they get reallocated above when possible later.? It seemed
> to work, but again broke GMA despite the BAR originally containing an
> invalid address as
On Thu, 12 Apr 2012, 01:57:17 BST, Yinghai Lu wrote:
> On Tue, Apr 10, 2012 at 2:19 PM, Steven Newbury
> wrote:
> > Another thought, normally the integrated graphics has an "AGP"
> > aperture of 256M @0xe000, which is detected by agpgart-intel, this
> > will need to be moved up above 4G to
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury
wrote:
> Thanks, that fixed it! :) I had a similar patch I've been working on but I
> had my fix in the wrong place!
>
> In the working case, initially the BIOS has set GMA to within the low system
> DRAM 0xC000 obviously invalid. ?This
On Thu, 12 Apr 2012, 01:57:17 BST, Yinghai Lu ying...@kernel.org wrote:
On Tue, Apr 10, 2012 at 2:19 PM, Steven Newbury st...@snewbury.org.uk
wrote:
Another thought, normally the integrated graphics has an AGP
aperture of 256M @0xe000, which is detected by agpgart-intel, this
will
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury st...@snewbury.org.uk wrote:
Thanks, that fixed it! :) I had a similar patch I've been working on but I
had my fix in the wrong place!
In the working case, initially the BIOS has set GMA to within the low system
DRAM 0xC000 obviously
On Thu, 12 Apr 2012, 17:07:33 BST, Yinghai Lu ying...@kernel.org wrote:
On Thu, Apr 12, 2012 at 4:22 AM, Steven Newbury st...@snewbury.org.uk
wrote:
Thanks, that fixed it! :) I had a similar patch I've been working on
but I had my fix in the wrong place!
In the working case, initially
On Tue, Apr 10, 2012 at 2:19 PM, Steven Newbury
wrote:
> Another thought, normally the integrated graphics has an "AGP"
> aperture of 256M @0xe000, which is detected by agpgart-intel, this
> will need to be moved up above 4G to free up 0xe000 for the
> radeon, assuming the "agp_bridge"
On Tue, Apr 10, 2012 at 2:19 PM, Steven Newbury st...@snewbury.org.uk wrote:
Another thought, normally the integrated graphics has an AGP
aperture of 256M @0xe000, which is detected by agpgart-intel, this
will need to be moved up above 4G to free up 0xe000 for the
radeon, assuming the
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