Re: [PATCH 2/8] PCI: Add pci_find_common_upstream_dev()

On Fri, Mar 30, 2018 at 12:46:42PM -0600, Logan Gunthorpe wrote: > > > On 29/03/18 07:58 PM, Jerome Glisse wrote: > > On Thu, Mar 29, 2018 at 10:25:52AM -0600, Logan Gunthorpe wrote: > >> > >> > >> On 29/03/18 10:10 AM, Christian König wrote: > >>> Why not? I mean the dma_map_resource() function

drm/scheduler for vc5

I've been keeping my eye on what's going on with drm/scheduler, and I'm definitely interested in using it. I've got some questions about how to fit it to this HW, though. For this HW, most rendering jobs have two phases: binning and rendering, and the HW has two small FIFOs for descriptions of

Re: [PATCH v4 1/5] drm/blend: Add a generic alpha property

Maxime Ripard writes: > Some drivers duplicate the logic to create a property to store a per-plane > alpha. > > This is especially useful if we ever want to support extra protocols for > Wayland like: >

[Bug 105218] Regresion in 847d0a393d7f0f967f39302900d5330f32b804c8

https://bugs.freedesktop.org/show_bug.cgi?id=105218 --- Comment #5 from Timothy Arceri --- Ok built it correctly this time. No crash with Mesa git and LLVM 7 the sample runs fine on my RX580. Possible there is a bug in LLVM 6. -- You are receiving this mail because: You

[PATCH 2/2] drm/amdgpu: Add modeset module option

amdgpu driver lacks of modeset module option other drm drivers provide for enforcing or disabling the driver load. Interestingly, the amdgpu_mode variable declaration is already found in the header file, but the actual implementation seems to have been forgotten. This patch adds the missing

[PATCH 1/2] drm/amdgpu: Fix memory leaks at amdgpu_init() error path

amdgpu driver checks vgacon_text_force() after some initializations but without cleaning up. This will result in leaks. Move the check of vgacon_text_force() to the beginning of amdgpu_init() for fixing it and also for optimization. Signed-off-by: Takashi Iwai ---

Re: [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status

On Fri, 2018-03-30 at 19:19 +, Souza, Jose wrote: > On Fri, 2018-03-30 at 11:28 -0700, Pandiyan, Dhinakaran wrote: > > On Wed, 2018-03-28 at 15:30 -0700, José Roberto de Souza wrote: > > > IGT tests could be improved with sink status, knowing for sure that > > > hardware have activate or

[Bug 102553] Venus PRO R9 M265X amdgpu: Kernel OOPS si_dpm_set_power_state unable to handle kernel NULL pointer dereference

https://bugs.freedesktop.org/show_bug.cgi?id=102553 --- Comment #14 from Stefano Cipriani --- The patch works as expected! However when I set the state to battery I get in dmesg: [drm:si_dpm_set_power_state [amdgpu]] *ERROR* invalid pcie lane request: 7 and the same message

Re: [PATCH v2 1/3] drm/vc4: Expose gamma as atomic property

Stefan Schake writes: > We are an atomic driver so the gamma LUT should also be exposed as a > CRTC property through the DRM atomic color management. This will also > take care of the legacy path for us. > > Signed-off-by: Stefan Schake > --- > v2: Use

Re: [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status

On Wed, 2018-03-28 at 15:30 -0700, José Roberto de Souza wrote: > IGT tests could be improved with sink status, knowing for sure that > hardware have activate or exit PSR. > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi > Signed-off-by:

[Bug 99801] Rx480 doesn't output properly onto z27q at 5120x2880

https://bugs.freedesktop.org/show_bug.cgi?id=99801 --- Comment #25 from Matthew Treinish --- (In reply to Jean-Yves Avenard from comment #21) > Adding some likely unhelpful info. > But I've had similar (though not the same) problem since I got this screen. > However, unlike

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