Since platform_get_irq() never returned zero, so it need not to check
whether it returned zero, and we use the return error code of
platform_get_irq() to replace the current return error code.
Please refer to the commit a85a6c86c25b ("driver core: platform: Clarify
that IRQ 0 is invalid") to get
On 02/08/2023 16:47, Douglas Anderson wrote:
In the kernel doc for the `follower_lock` member of `struct drm_panel`
there was a typo where it was called `followers_lock`. This resulted
in a warning when making "htmldocs":
./include/drm/drm_panel.h:270: warning:
Function parameter or
Hi,
On Thu, 27 Jul 2023 18:01:10 +0800, Pin-yen Lin wrote:
> On system resume, the driver might call it6505_poweron directly if the
> runtime PM hasn't been enabled. In such case, pm_runtime_get_if_in_use
> will always return 0 because dev->power.runtime_status stays at
> RPM_SUSPENDED, and the
On 01/08/2023 21:50, Matthew Brost wrote:
In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
mapping between a drm_gpu_scheduler and drm_sched_entity. At first this
seems a bit odd but let us explain the reasoning below.
1. In XE the submission order from multiple
On Wed, 02 Aug 2023 21:36:54 +0300, Dmitry Baryshkov wrote:
> All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length.
> This includes the common block itself, enc subblocks and some empty
> space around. Change that to pass 0x4 instead, the length of common
> register block
On Wed, 02 Aug 2023 09:48:53 -0400, Jonathan Marek wrote:
> sm8550 has 16 vbif clients.
>
> This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
> initialized. This fixes DMA4/DMA5 planes not displaying correctly.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: increase memtype count
Currently, the vga_is_firmware_default() function works on x86 and IA64
architectures, but it is a no-op on ARM64, PPC, RISC-V, etc. This patch
completes the implementation by tracking the firmware framebuffer's address
range. The added code is trying to identify the VRAM aperture that contains
Hi Dave, Daniel,
Some fixes for the 6.5 RC this week: one for GVT display I2C handling,
which came via gvt-fixes merge, one for premature freeing of request
memory, and finally one fix for Gen12 AUX invalidatation flow to correctly
align it with the documented sequence.
Regards,
Tvrtko
Hi,
On Mon, 31 Jul 2023 23:02:57 +0200, Marek Vasut wrote:
> Add entry for Innolux G156HCE-L01 15.6" 1920x1080 24bpp
> dual-link LVDS TFT panel. Documentation is available at [1].
>
> [1]
> https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G156HCE-L01_Rev.C3_Datasheet.pdf
>
>
Hi,
On Tue, 18 Jul 2023 10:44:11 +0200, Alexander Stein wrote:
> This bridge has an interrupt line for event signaling. Add the
> corresponding property.
>
>
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git
(drm-misc-next)
[1/1] dt-bindings: display: bridge: tc358867:
On Thu, Aug 03, 2023 at 10:09:39AM +0800, GUO Zihua wrote:
> fbcon_registered_fb and fbcon_num_registered_fb is not referred outside
> drivers/video/fbdev/core/fbcon.c, so make them static.
>
> Signed-off-by: GUO Zihua
Applied both of your patches to drm-misc-next.
-Daniel
> ---
>
Am 01.08.23 um 22:50 schrieb Matthew Brost:
DRM_SCHED_POLICY_SINGLE_ENTITY creates a 1 to 1 relationship between
scheduler and entity. No priorities or run queue used in this mode.
Intended for devices with firmware schedulers.
v2:
- Drop sched / rq union (Luben)
I think we might rather
On Thu, 3 Aug 2023 at 10:53, Christian König wrote:
>
> Am 01.08.23 um 22:50 schrieb Matthew Brost:
> > Add generic schedule message interface which sends messages to backend
> > from the drm_gpu_scheduler main submission thread. The idea is some of
> > these messages modify some state in
Check mgr->mst_primary, before passing it to
the get_mst_branch_device_by_guid_helper(), otherwise NULL dereference
may occur in the call to memcpy() and cause:
[12579.365869] BUG: kernel NULL pointer dereference, address: 0049
[12579.365878] #PF: supervisor read access in kernel mode
On 03/08/2023 11:22, Maxime Ripard wrote:
On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil Armstrong wrote:
Hi,
On 18/07/2023 17:31, Michael Riesch wrote:
Hi all,
It doesn't line up.
Signed-off-by: Simon Ser
Suggested-by: Jani Nikula
---
Documentation/gpu/drm-mm.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst
index 513197359aba..c19b34b1c0ed 100644
---
Hi,
Here's this week drm-misc-fixes PR
Maxime
The following changes since commit 39b1320e5dc2b707dfb5c25b0298ce9d4fc05aea:
drm/fb-helper: Remove unused inline function drm_fb_helper_defio_init()
(2023-07-25 20:38:37 +0200)
are available in the Git repository at:
Hi Peter,
> > Ok, I'll keep your use-case in mind but AFAICS, the process that creates
> > the udmabuf can be considered the owner. So, I think it makes sense that
> > the owner's VMA range can be registered (via mmu_notifiers) for updates.
>
> No need to have your special attention on this; my
On 02/08/2023 16:47, Douglas Anderson wrote:
In commit d2aacaf07395 ("drm/panel: Check for already prepared/enabled
in drm_panel") the formatting for a code block was not quite
right. This caused an error when building htmldocs:
Documentation/gpu/todo.rst:469: ERROR: Unexpected indentation.
Il 03/08/23 08:28, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Wed, 2023-08-02 at 12:41 +0200, AngeloGioacchino Del Regno wrote:
Il 02/08/23 08:24, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Fri, 2023-06-23 at 11:49 +0200, AngeloGioacchino Del Regno
wrote:
External email : Please do not
Hi
On Wed, Aug 02, 2023 at 11:07:09AM -0600, Jeffrey Hugo wrote:
> On 7/31/2023 10:12 AM, Stanislaw Gruszka wrote:
> > Add DRM_IVPU_PARAM_CAPABILITIES ioctl to query driver capabilities.
> > For now use it for identify metric streamer and new dma memory range
> > features. Currently upstream
On Thu, Aug 03, 2023 at 10:40:35AM +0200, Daniel Vetter wrote:
> On Thu, Aug 03, 2023 at 10:09:39AM +0800, GUO Zihua wrote:
> > fbcon_registered_fb and fbcon_num_registered_fb is not referred outside
> > drivers/video/fbdev/core/fbcon.c, so make them static.
> >
> > Signed-off-by: GUO Zihua
>
>
On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
> On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil Armstrong wrote:
> > Hi,
> >
> > On 18/07/2023 17:31, Michael Riesch wrote:
> > > Hi all,
> > >
> > > This series adds support for the partial display mode to the Sitronix
> > >
On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
> On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
> > On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil Armstrong wrote:
> > > Hi,
> > >
> > > On 18/07/2023 17:31, Michael Riesch wrote:
> > > > Hi all,
> > > >
> > > >
On Thu, Aug 03, 2023 at 11:30:52AM +0200, Neil Armstrong wrote:
> On 03/08/2023 11:22, Maxime Ripard wrote:
> > On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
> > > On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
> > > > On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil
Hi Jason,
> > > Right, the "the zero pages are changed into writable pages" in your
> > > above comment just might not apply, because there won't be any page
> > > replacement (hopefully :) ).
>
> > If the page replacement does not happen when there are new writes to the
> > area where the hole
On Wed, Aug 02, 2023 at 03:10:44PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Mesa stopped using these pretty early in a6xx bringup. Take advantage
> of this to disallow some legacy UABI.
>
> Signed-off-by: Rob Clark
> ---
> So, it was late 2018 when mesa stopped using relocs. At that
fix Smatch static checker warning
-Fix uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195")
Signed-off-by: Nancy.Lin
---
v3: fix reviewer comment in v2
v2: add Fixes tag
---
Hi Daniel,
>
> On Tue, Jul 18, 2023 at 01:28:57AM -0700, Vivek Kasireddy wrote:
> > When a hole is punched in the memfd or when a page is replaced for
> > any reason, the udmabuf driver needs to get notified in order to
> > update its list of pages with the new page. To accomplish this, we
> >
On Wed, Aug 02, 2023 at 03:21:52PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> This was not strictly necessary, as page unpinning (ie. shrinker) only
> cares about the resv. It did give us some extra sanity checking for
> userspace controlled iova, and was useful to catch issues on kernel and
On 03/08/2023 06:15, Iddamsetty, Aravind wrote:
On 27-07-2023 15:43, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory
Am 28.07.23 um 20:34 schrieb Arthur Grillo:
The drm_exec tests where crashing[0] because of a null dereference. This
is caused by a new access of the `driver` attribute of `struct
drm_driver` on drm_gem_private_object_init(). Alloc the drm_device to
fix that.
[0]
[15:05:24] ==
On Thu, 3 Aug 2023 at 11:57, Simon Ser wrote:
>
> When I originally wrote these docs, I couldn't manage to insert a
> cross-reference to a section. Here's how it can be done.
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
Acked-by: me
> ---
>
Fix AV1 decoding failure when the iova is 36bit.
Before this fix, the decoder was accessing incorrect addresses with 36bit
iova tile buffer, leading to iommu faults.
Fixes: 2f5d0aef37c6 ("media: mediatek: vcodec: support stateless AV1 decoder")
Signed-off-by: Xiaoyong Lu
---
Changes from v2:
-
On 12/07/23 8:10 am, Manikandan Muralidharan wrote:
> - XLCDC in SAM9X7 has different sets of registers and additional
> configuration bits when compared to previous HLCDC IP. Read/write
> operation on the controller registers is now separated using the
> XLCDC status flag.
> - HEO
On 12/07/23 8:10 am, Manikandan Muralidharan wrote:
> Add support for Display Pixel Interface (DPI) Compatible Mode
> support in atmel-hlcdc driver for XLCDC IP along with legacy
> pixel mapping.DPI mode BIT is configured in LCDC_CFG5 register.
>
> Signed-off-by: Manikandan Muralidharan
>
agp_gatt_table is not referred outside drivers/char/agp/generic.c, so
make it static
Signed-off-by: GUO Zihua
---
drivers/char/agp/generic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index
Dear Maintainers,
Hereby I would like to report an apparent bug in the nouveau driver in
linux/6.1.38-2.
Running a current debian stable on a Dell Latitude E6510 with a
"NVIDIA Corporation GT218M" graphic card, the monitor turns black
after the grub screen. Also switching to a console
fbcon_registered_fb and fbcon_num_registered_fb is not referred outside
drivers/video/fbdev/core/fbcon.c, so make them static.
Signed-off-by: GUO Zihua
---
drivers/video/fbdev/core/fbcon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/core/fbcon.c
Hi,
On 18/07/2023 17:31, Michael Riesch wrote:
Hi all,
This series adds support for the partial display mode to the Sitronix
ST7789V panel driver. This is useful for panels that are partially
occluded by design, such as the Jasonic JT240MHQS-HWT-EK-E3. Support
for this particular panel is
On 31/07/2023 23:02, Marek Vasut wrote:
Add support for Innolux G156HCE-L01 15.6" 1920x1080 24bpp
dual-link LVDS TFT panel. Documentation is available at [1].
The middle frequency is tuned slightly upward from 70.93 MHz
to 72 MHz, otherwise the panel shows slight flicker.
[1]
On Mon, Jul 24, 2023 at 01:58:39PM -0400, Justin Green wrote:
> Add a check to mtk_drm_mode_fb_create() that rejects any modifier that
> is not the AFBC mode supported by MT8195's display overlays.
>
> Tested by booting ChromeOS and verifying the UI works, and by running
> the ChromeOS
On 28/06/2023 22:35, Konrad Dybcio wrote:
This series attempts to introduce Adreno 700 support (with A730 and A740
found on SM8450 and SM8550 respectively), reusing much of the existing
A6xx code. This submission largely lays the groundwork for expansion and
more or less gives us feature parity
On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil Armstrong wrote:
> Hi,
>
> On 18/07/2023 17:31, Michael Riesch wrote:
> > Hi all,
> >
> > This series adds support for the partial display mode to the Sitronix
> > ST7789V panel driver. This is useful for panels that are partially
> > occluded by
Am 03.08.23 um 10:58 schrieb Daniel Vetter:
On Thu, 3 Aug 2023 at 10:53, Christian König wrote:
Am 01.08.23 um 22:50 schrieb Matthew Brost:
Add generic schedule message interface which sends messages to backend
from the drm_gpu_scheduler main submission thread. The idea is some of
these
On Wed, 02 Aug 2023, Ziqi Zhao wrote:
> In the bug reported by Syzbot, the variable `den == (1 << 22)` and
> `mode->vscan == (1 << 10)`, causing the multiplication to overflow and
> accidentally make `den == 0`. To prevent any chance of overflow, we
> replace `num` and `den` with 64-bit unsigned
When I originally wrote these docs, I couldn't manage to insert a
cross-reference to a section. Here's how it can be done.
Signed-off-by: Simon Ser
Cc: Daniel Vetter
Cc: Pekka Paalanen
---
Documentation/gpu/drm-kms.rst | 2 ++
Documentation/gpu/drm-mm.rst | 2 ++
include/uapi/drm/drm.h
The main motivation is to repeat that dumb buffers should not be
abused for anything else than basic software rendering with KMS.
User-space devs are more likely to look at the IOCTL docs than to
actively search for the driver-oriented "Dumb Buffer Objects"
section.
Signed-off-by: Simon Ser
Cc:
On Thu, 03 Aug 2023, Simon Ser wrote:
> When I originally wrote these docs, I couldn't manage to insert a
> cross-reference to a section. Here's how it can be done.
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
> ---
> Documentation/gpu/drm-kms.rst | 2 ++
>
On Thu, 3 Aug 2023 at 11:22, Maxime Ripard wrote:
>
> On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
> > On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
> > > On Thu, Aug 03, 2023 at 10:11:22AM +0200, Neil Armstrong wrote:
> > > > Hi,
> > > >
> > > > On 18/07/2023
On Thursday, August 3rd, 2023 at 12:07, Jani Nikula
wrote:
> > DRM Sync Objects
> > ===
>
> Care to fix that title underline too, in a separate patch, please?
Sure, submitted!
> This one's
>
> Reviewed-by: Jani Nikula
Thank you!
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating
New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in mtk_gamma_set_common() to perform the right calculation.
Signed-off-by: AngeloGioacchino
In preparation for adding a 12-bits gamma support for the DISP_GAMMA
IP, remove the mtk_gamma_set_common() function and move the relevant
bits in mtk_gamma_set() for DISP_GAMMA and mtk_aal_gamma_set() for
DISP_AAL: since the latter has no more support for gamma manipulation
(being moved to a
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
Reviewed-by: Alexandre Mergnat
---
Newer Gamma IP have got multiple LUT banks: support specifying the
size of the LUT banks and handle bank-switching before programming
the LUT in mtk_gamma_set_common() in preparation for adding support
for MT8195 and newer SoCs.
Suggested-by: Jason-JH.Lin
[Angelo: Refactored original commit]
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin
Signed-off-by: Jason-JH.Lin
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by:
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through in both DISP_GAMMA and DISP_AAL for gamma
setting.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
Reviewed-by: Alexandre Mergnat
---
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
Compress the entry for mediatek,mt8173-disp-aal, as it fits in one
line, and fix the style; while at it, also add the usual sentinel
comment to the last entry.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 7
The kerneldoc for struct mtk_disp_aal was entirely wrong: rewrite it
to actually document the structure.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
The mtk_disp_gamma structure was completely undocumented: add some
kerneldoc documentation to it.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin
Signed-off-by: AngeloGioacchino Del Regno
Feel free to add Reviewed-by: Christian König
to the whole series and push to drm-misc-next.
Thanks,
Christian.
Am 14.07.23 um 16:10 schrieb Karolina Stolarek:
This series introduces KUnit[1] tests for TTM (Translation Table Manager)
subsystem, a memory manager used by graphics drivers to
Hi,
On Wed, 02 Aug 2023 07:47:27 -0700, Douglas Anderson wrote:
> In the kernel doc for the `follower_lock` member of `struct drm_panel`
> there was a typo where it was called `followers_lock`. This resulted
> in a warning when making "htmldocs":
>
> ./include/drm/drm_panel.h:270: warning:
>
Hi,
On Fri, 21 Jul 2023 20:44:15 +0800, Sandor Yu wrote:
> CEC interrupt status/mask and logical address registers
> will be reset when device enter suspend.
> It will cause cec fail to work after device resume.
> Add CEC suspend/resume functions, reinitialize logical address registers
> and
On Thu, Aug 03, 2023 at 08:24:07AM +, Kasireddy, Vivek wrote:
> Hi Daniel,
>
> >
> > On Tue, Jul 18, 2023 at 01:28:57AM -0700, Vivek Kasireddy wrote:
> > > When a hole is punched in the memfd or when a page is replaced for
> > > any reason, the udmabuf driver needs to get notified in order
Am 01.08.23 um 22:50 schrieb Matthew Brost:
Add generic schedule message interface which sends messages to backend
from the drm_gpu_scheduler main submission thread. The idea is some of
these messages modify some state in drm_sched_entity which is also
modified during submission. By scheduling
Changes in v9:
- As per previous conversation with CK Hu, added a commit that
de-commonizes the gamma setting function that was used in
both DISP_AAL and DISP_GAMMA, now each of them have their
own .gamma_set() callback (mtk_disp_gamma_set_common() has
been removed).
- Added a change
Use drm_color_lut_extract() to avoid open-coding the bits reduction
calculations for each color channel and use a struct drm_color_lut
to temporarily store the information instead of an array of u32.
Also, slightly improve the precision of the HW LUT calculation in the
LUT DIFF case by performing
On Thu, 03 Aug 2023, Simon Ser wrote:
> It doesn't line up.
>
> Signed-off-by: Simon Ser
> Suggested-by: Jani Nikula
Reviewed-by: Jani Nikula
> ---
> Documentation/gpu/drm-mm.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/gpu/drm-mm.rst
On Thu, Aug 03, 2023 at 07:35:51AM +, Kasireddy, Vivek wrote:
> Hi Jason,
>
> > > > Right, the "the zero pages are changed into writable pages" in your
> > > > above comment just might not apply, because there won't be any page
> > > > replacement (hopefully :) ).
> >
> > > If the page
Hi Zhanjun,
On Thu, Jul 27, 2023 at 01:13:23PM -0700, Zhanjun Dong wrote:
> This attempts to avoid circular locking dependency between flush delayed work
> and intel_gt_reset.
> Switched from cancel_delayed_work_sync to cancel_delayed_work, the non-sync
> version for reset path, it is safe as
Hi, Vivek,
On Thu, Aug 03, 2023 at 08:08:41AM +, Kasireddy, Vivek wrote:
> > Isn't it already too late though to wait that notification until page is
> > installed? Because here you pinned the page for DMA, I think it means
> > before a new page installed (but after the page is invalidated)
On Wed, Aug 02, 2023 at 03:42:04PM +0800, Zhu Wang wrote:
> The driver depends on CONFIG_OF, so it is not necessary to use CONFIG_OF
> and of_match_ptr() here, we remove them all.
>
> Even for drivers that do not depend on CONFIG_OF, it's almost always
> better to leave out the of_match_ptr(),
On 8/2/23 17:47, Jason-JH.Lin wrote:
Add mtk_drm_crtc_path enum for eatch display path.
Typo: each
Instead of using array index of all_drm_priv in mtk_drm_kms_init(),
mtk_drm_crtc_path enum can make more readable.
can make *code* more readable ?
Signed-off-by: Jason-JH.Lin
---
abs_diff() belongs to math.h. Move it there.
This will allow others to use it.
Reviewed-by: Jiri Slaby # tty/serial
Acked-by: Jani Nikula
Acked-by: Greg Kroah-Hartman
Reviewed-by: Andi Shyti
Reviewed-by: Philipp Zabel # gpu/ipu-v3
Signed-off-by: Andy Shevchenko
---
v4:
- Cc'ed to Andrew (as
From: Arnd Bergmann
tu102_gr_load() is completely unused and can be removed to address
this warning:
drivers/gpu/drm/nouveau/dispnv50/disp.c:2517:1: error: no previous prototype
for 'nv50_display_create'
Another patch was sent in the meantime to mark the function static but
that would just
dge/samsung-dsim.o:(samsung_dsim_init) in
>>> archive vmlinux.a
Steps to reproduce on the latest linux-next:
$ git checkout next-20230803
$ wget -O '.config'
'https://raw.githubusercontent.com/google/syzkaller/master/dashboard/config/linux/upstream-arm64-kasan.config'
$ make CC=clang ARCH=ar
On Thu, Aug 03, 2023 at 01:43:08PM +0200, Maxime Ripard wrote:
> On Thu, Aug 03, 2023 at 12:26:03PM +0200, Daniel Vetter wrote:
> > On Thu, 3 Aug 2023 at 11:22, Maxime Ripard wrote:
> > >
> > > On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
> > > > On Thu, Aug 03, 2023 at
On 03.08.23 14:14, Jason Gunthorpe wrote:
On Thu, Aug 03, 2023 at 07:35:51AM +, Kasireddy, Vivek wrote:
Hi Jason,
Right, the "the zero pages are changed into writable pages" in your
above comment just might not apply, because there won't be any page
replacement (hopefully :) ).
If the
On 8/2/23 17:47, Jason-JH.Lin wrote:
1. Add encoder_index function to mtk_ddp_comp_funcs to support dynamic
connector selection for some ddp_comp who has encoder_index.
2. Add mtk_ddp_comp_encoder_index_set function to set encoder_index to
each comp.
Usually a commit that does two things in a
Hi Marek,
On Mon, 31 Jul 2023 23:02:58 +0200
Marek Vasut wrote:
> Add support for Innolux G156HCE-L01 15.6" 1920x1080 24bpp
> dual-link LVDS TFT panel. Documentation is available at [1].
Interesting, I'm bringing up this exact panel right now and found your
patch.
> The middle frequency is
On Thu, Aug 03, 2023 at 11:11:13AM +0100, Tvrtko Ursulin wrote:
>
> On 01/08/2023 21:50, Matthew Brost wrote:
> > In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
> > mapping between a drm_gpu_scheduler and drm_sched_entity. At first this
> > seems a bit odd but let us explain
On Thu, Aug 03, 2023 at 08:48:56AM -0400, Justin Green wrote:
> > See c91acda3a380 ("drm/gem: Check for valid formats") and the related gem
> fb helper functions to see how this is supposed to be done.
>
> Oh that's interesting, so does this imply that the infrastructure
> automatically calls
Hi Marek,
On Thu, 3 Aug 2023 16:25:37 +0200
Marek Vasut wrote:
> On 8/3/23 16:23, Luca Ceresoli wrote:
> > Hi Marek,
>
> Hi,
>
> > On Mon, 31 Jul 2023 23:02:58 +0200
> > Marek Vasut wrote:
> >
> >> Add support for Innolux G156HCE-L01 15.6" 1920x1080 24bpp
> >> dual-link LVDS TFT panel.
On Thu, Aug 03, 2023 at 12:26:03PM +0200, Daniel Vetter wrote:
> On Thu, 3 Aug 2023 at 11:22, Maxime Ripard wrote:
> >
> > On Thu, Aug 03, 2023 at 10:51:57AM +0200, Daniel Vetter wrote:
> > > On Thu, Aug 03, 2023 at 10:48:57AM +0200, Maxime Ripard wrote:
> > > > On Thu, Aug 03, 2023 at 10:11:22AM
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
on G12A compatible SoCs.
Acked-by: Conor Dooley
Signed-off-by: Neil Armstrong
---
include/dt-bindings/clock/g12a-clkc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/g12a-clkc.h
The VCLK and VCLK_DIV clocks have supplementary bits.
The VCLK has a "SOFT RESET" bit to toggle after the whole
VCLK sub-tree rate has been set, this is implemented in
the gate enable callback.
The VCLK_DIV clocks as enable and reset bits used to disable
and reset the divider, associated with
Add the MIPI DSI Analog & Digital PHY nodes and the DSI control
nodes with proper port endpoint to the VPU.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++
1 file changed, 70 insertions(+)
diff --git
In order to setup the DSI clock, let's make the unused VCLK2 clock path
configuration via CCF.
The nocache option is removed from following clocks:
- vclk2_sel
- vclk2_input
- vclk2_div
- vclk2
- vclk_div1
- vclk2_div2_en
- vclk2_div4_en
- vclk2_div6_en
- vclk2_div12_en
- vclk2_div2
- vclk2_div4
The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver
(ver 1.21a),
with a custom glue managing the IP resets, clock and data input similar to the
DW-HDMI
glue on the same Amlogic SoCs.
This is a follow-up of v5 now the DRM patches are applied, the clk & DT changes
remains
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