Am Dienstag, 21. Januar 2020, 23:48:28 CET schrieb Heiko Stuebner:
> From: Heiko Stuebner
>
> rockchip_drm_endpoint_is_subdriver() may also return error codes.
> For example if the target-node is in the disabled state, so no
> platform-device is getting created for it.
>
>
From: Heiko Stuebner
The LTK050H3146W is 5.0" 720x1280 DSI display. There are two variants
with essentially the same name, LTK050H3146W and LTK050H3146W-A2.
They differ in their init sequence and mode details.
changes in v2:
- add display variants
Signed-off-by: Heiko Stuebner
---
dr
From: Heiko Stuebner
The LTK050H3146W is a 5.0" 720x1280 DSI display.
changes in v2:
- add display variants
Signed-off-by: Heiko Stuebner
---
.../display/panel/leadtek,ltk050h3146w.yaml | 51 +++
1 file changed, 51 insertions(+)
create mode 100644
Documentation/devic
From: Heiko Stuebner
The LTK050H3146W is 5.0" 720x1280 DSI display. There are two variants
with essentially the same name, LTK050H3146W and LTK050H3146W-A2.
They differ in their init sequence and mode details.
changes in v2:
- add display variants
changes in v3:
- fixed indent
From: Heiko Stuebner
The LTK050H3146W is a 5.0" 720x1280 DSI display.
Signed-off-by: Heiko Stuebner
---
Sam said he had applied this to drm-misc-next already,
but I can't see it so far, so included for completenes.
.../display/panel/leadtek,ltk050h3146w.yaml | 51 +
ed-by: Rob Herring
>
> [...]
Applied, thanks!
[1/1] dt-bindings: display: convert rockchip rk3066 hdmi bindings to yaml
commit: 8eea6e26fc2eda6922e5008ccb7f55bc1775d5b3
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Hi Johan,
Am Freitag, 3. April 2020, 15:36:30 CEST schrieb Johan Jonker:
> Current dts files with 'hdmi' nodes for rk3066 are manually verified.
> In order to automate this process rockchip,rk3066-hdmi.txt
> has to be converted to yaml.
>
> Signed-off-by: Johan Jonker
> +++
>
Am Donnerstag, 2. April 2020, 15:13:10 CEST schrieb Ville Syrjälä:
> On Tue, Mar 03, 2020 at 01:52:27PM +0100, Heiko Stuebner wrote:
> > Hi,
> >
> > Am Montag, 2. März 2020, 21:34:24 CET schrieb Ville Syrjala:
> > > From: Ville Syrjälä
> > >
> &
From: Heiko Stuebner
The LTK500HD1829W is 5.0" 720x1280 DSI display.
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile| 1 +
.../drm/panel/panel-leadtek-ltk050h3146w.c| 589 ++
3
From: Heiko Stuebner
The LTK050H3146W is a 5.0" 720x1280 DSI display.
Signed-off-by: Heiko Stuebner
---
.../display/panel/leadtek,ltk050h3146w.yaml | 49 +++
1 file changed, 49 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/le
eeded semicolon
>
> Reported-by: Hulk Robot
> Signed-off-by: Zheng Bin
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: Remove unneeded semicolon
commit: 611e22b1d9f61a8742c99433de9ff40795574c61
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--
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___
dr
t; drivers/gpu/drm/rockchip//cdn-dp-core.c:1126:5: warning: no previous
> prototype for ‘cdn_dp_resume’ [-Wmissing-prototypes]
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: cdn-dp-core: Make cdn_dp_core_suspend/resume static
commit: 7c49abb4c2f8853520abc05b7f7e8b751fbb30
Hi Samuel,
Am Montag, 31. August 2020, 02:47:56 CEST schrieb Samuel Dionne-Riel:
> I have an Asus Chromebook Tablet CT100PA, which I will refer to as
> "dumo" from this point on, which is a specific variant of gru-scarlet.
> As far as I am aware, all gru-scarlet are the same, except for the
>
Am Freitag, 18. September 2020, 13:46:53 CEST schrieb Yannick Fertre:
> The current driver calls drm_bridge_add(), to add the dsi bridge
> to the global bridge list, in dw_mipi_dsi_host_attach().
> Thus, it relies on the probing of panel or bridge sub-nodes to
> trigger the execution of dsi host
PX30 VOP
commit: 2aae8ed1f390a42ec752e4403ffca877fb3260e1
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Hi Sandy,
Am Freitag, 19. Juni 2020, 04:12:51 CEST schrieb Sandy Huang:
> RGB888 format msb is red component and the lsb is blue component,
> at vop full platform this is swapped, and this is different from vop
> lite and vop next, so add this patch to fix it.
just me struggling with color
> {}
> };
> MODULE_DEVICE_TABLE(of, dt_match);
on a PX30-board (sibling of rk3326) with a 720x1280 panel and
glmark2 running all tests
Tested-by: Heiko Stuebner
and as this is the generic compatible from the binding:
Reviewed-by: Heiko Stuebner
> don't try to read.
>
> Signed-off-by: Tomeu Vizoso
on a PX30-board (sibling of rk3326) with a 720x1280 panel and
glmark2 running all tests
Tested-by: Heiko Stuebner
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_PARENT to sclk for rk3066a i2s and uart
clocks
commit: 5868491e1257786628fdd2457dfb77609f49f91d
[2/7] clk: rockchip: fix i2s gate bits on rk3066 and rk3188
commit: caa2fd752ecb80faf7a2e1cdadc737187934675e
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___
> Initialize the endpoint_id variable to 0 to avoid using an
> uninitialized variable in that case.
Applied, thanks!
[1/1] drm/rockchip: Avoid uninitialized use of endpoint id in LVDS
commit: aec9fe892812ed10d0bffcf309d2a8fc380d8ce6
Best regards,
[...]
Applied, thanks!
[1/1] ARM: dts: rockchip: Remove 0 point from brightness-levels on rk3288-veyron
commit: 225c59b9235a421cdb219be5fbc13126a49714a6
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From: Heiko Stuebner
The Innolux n116bge panel has an eDP connector and 3*6 bits bus format.
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel
On Sat, 9 Jan 2021 14:09:51 +0100, Heiko Stuebner wrote:
> The Innolux n116bge panel has an eDP connector and 3*6 bits bus format.
Applied, thanks!
[1/1] drm/panel: panel-simple: add bus-format and connector-type to Innolux
n116bge
commit: 87969bcd49480508568070fd93d7367f03316aa9
B
From: Heiko Stuebner
In a followup patch, we'll need to access the pclk ourself to enable some
functionality, so get and store it in the rockchip dw-dsi variant as well.
Clocks are refcounted, so possible cascading enablements are
no problem.
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm
From: Heiko Stuebner
The dsi controller includes access to the dphy which might be used
not only for dsi output but also for csi input on dsi1, so add the
necessary #phy-cells to allow it to be used as phy.
Signed-off-by: Heiko Stuebner
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
1
From: Heiko Stuebner
SoCs like the rk3288 and rk3399 have 3 mipi dphys on them. One is TX-
only, one is RX-only and one can be configured to do either TX or RX.
The RX phy is statically connected to the first Image Signal Processor,
the TX phy is statically connected to the first DSI controller
From: Heiko Stuebner
The Rockchip DSI controller on some SoCs also controls a bidrectional
dphy, which would be connected to an Image Signal Processor as a phy
in the rx configuration.
So allow a #phy-cells property for the dsi controller.
Signed-off-by: Heiko Stuebner
---
.../bindings
From: Heiko Stuebner
ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.
Signed-off-by: Heiko Stuebner
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26
1 file changed, 26 insertions
.
That solution is needed at least on rk3399 and rk3288 but no-one
has looked at camera support on rk3288 at all, so right now
only implement the rk3399 specifics.
Heiko Stuebner (6):
drm/rockchip: dsi: add own additional pclk handling
dt-bindings: display: rockchip-dsi: add optional #phy-cells property
From: Heiko Stuebner
This enables variant a of the clkout signal for camera applications
and also the cifclkin pinctrl setting.
Signed-off-by: Heiko Stuebner
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts
a14e97a34e3dc214d4
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--
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ied, thanks!
[1/1] drm/rockchip: dsi: remove extra component_del() call
commit: b354498bbe65c917d521b3b56317ddc9ab217425
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--
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commit: 7455cedf7c4d4d5d808913e14d859705612c54ce
Best regards,
--
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_FIRMWARE macro
commit: c0677e41a47fbb37c4ed7200e5c7f610a2ffbd4b
Best regards,
--
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: add alpha support for RK3036, RK3066, RK3126 and RK3188
commit: d099fa672cbe8766d9182e0fd04c65058200128a
[5/5] drm: rockchip: set alpha_en to 0 if it is not used
commit: 046e0db975695540c9d9898cdbf0b60533d28afb
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--
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_write()
commit: ae41d925c75b53798f289c69ee8d9f7d36432f6d
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8
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andling path
commit: 3dfa159f6b0c054eb63673fbf643a5f2cc862e63
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t; work correct if needed in the future.
Applied, thanks!
[1/1] drm/rockchip: vop_reg: add PX30 version info
commit: 872b68e9750eddd086b93a6004ebe82c64aef670
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--
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33 panels
commit: 610d9c311b1387f8c4ac602fee1f2a1cb0508707
Best regards,
--
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its probe
- add Sebastian's Tested-by
- add Rob's Ack for the phy-cells property
Heiko Stuebner (6):
drm/rockchip: dsi: add own additional pclk handling
dt-bindings: display: rockchip-dsi: add optional #phy-cells property
drm/rockchip: dsi: add ability to work as a phy instead of full dsi
From: Heiko Stuebner
This enables variant a of the clkout signal for camera applications
and also the cifclkin pinctrl setting.
Signed-off-by: Heiko Stuebner
Tested-by: Sebastian Fricke
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12
1 file changed, 12 insertions(+)
diff
From: Heiko Stuebner
SoCs like the rk3288 and rk3399 have 3 mipi dphys on them. One is TX-
only, one is RX-only and one can be configured to do either TX or RX.
The RX phy is statically connected to the first Image Signal Processor,
the TX phy is statically connected to the first DSI controller
From: Heiko Stuebner
The dsi controller includes access to the dphy which might be used
not only for dsi output but also for csi input on dsi1, so add the
necessary #phy-cells to allow it to be used as phy.
Signed-off-by: Heiko Stuebner
Tested-by: Sebastian Fricke
---
arch/arm64/boot/dts
From: Heiko Stuebner
ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.
Signed-off-by: Heiko Stuebner
Tested-by: Sebastian Fricke
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26
1 file
From: Heiko Stuebner
The Rockchip DSI controller on some SoCs also controls a bidrectional
dphy, which would be connected to an Image Signal Processor as a phy
in the rx configuration.
So allow a #phy-cells property for the dsi controller.
Signed-off-by: Heiko Stuebner
Acked-by: Rob Herring
From: Heiko Stuebner
In a followup patch, we'll need to access the pclk ourself to enable some
functionality, so get and store it in the rockchip dw-dsi variant as well.
Clocks are refcounted, so possible cascading enablements are
no problem.
Signed-off-by: Heiko Stuebner
Tested-by: Sebastian
Hi Jonathan,
Am Dienstag, 16. März 2021, 19:27:53 CET schrieb Jonathan McDowell:
> The Rockchip RGB CRTC output driver attempts to avoid probing Rockchip
> subdrivers to see if they're a connected panel or bridge. However part
> of its checks assumes that if no OF platform device is found then it
On Sat, 6 Feb 2021 14:50:20 +0100, Heiko Stuebner wrote:
> The panel is able to work when dsi clock is non-continuous, thus
> the system power consumption can be reduced using such feature.
>
> Add MIPI_DSI_CLOCK_NON_CONTINUOUS to panel's mode_flags.
>
> Also the flag actually
]
Applied, thanks!
[1/1] drm/rockchip: Require the YTR modifier for AFBC
commit: 0de764474e6e0a74bd75715fed227d82dcda054c
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pport for non-continuous
HS clock")
and without it the panel only emits stripes instead of output.
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/panel/panel-elida-kd35t133.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c
Hi Sebastian,
Am Samstag, 13. Februar 2021, 12:19:57 CET schrieb Sebastian Fricke:
> On 11.02.2021 15:42, Heiko Stübner wrote:
> >Am Donnerstag, 11. Februar 2021, 06:25:15 CET schrieb Sebastian Fricke:
> >> On 10.02.2021 12:15, Heiko Stübner wrote:
> >> >Am Freitag, 5. Februar 2021, 15:55:56 CET
ction
commit: f8b5307074f8be80a9806d85b01e5ba933dd0360
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--
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Am Dienstag, 28. September 2021, 23:35:50 CEST schrieb Brian Norris:
> Since commit 43c2de1002d2, we perform most HW configuration in the
> bind() function. This configuration may be lost on suspend/resume, so we
> need to call it again. That may lead to errors like this after system
>
p the system.
>
> In local tests, this operation takes less than 20ms.
Applied, thanks!
[1/1] drm/rockchip: vop: Add timeout for DSP hold
commit: 085af7d28897deb08a4f64a29e55525f963cc041
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--
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ip: dsi: Disable PLL clock on bind error
commit: 5a614570172e1c9f59035d259dd735acd4f1c01b
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--
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t struct of_device_id vop_driver_dt_match[] = {
>
> Fixed it by removing of_match_ptr().
Applied, thanks!
[1/1] drm/rockchip: remove of_match_ptr() from vop_driver_dt_match
commit: 87185cc823693933308bd33a190032e9c262c75f
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--
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;static const struct of_device_id rockchip_dp_dt_ids[] = {
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: remove of_match_ptr()
commit: f7fc7a79bdbf20f2edef69dc62666a4f0cdac0e3
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--
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not declared. Should it be static?
Applied, thanks!
[1/1] drm/rockchip: dsi: make hstt_table static
commit: adfeef9370ff8b53c5f73cda3a63531d92b1ca64
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--
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1d
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commit: e1202c7a65b10258f9a11c1d2613c2aa91fe11cd
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pplied, thanks!
[1/1] drm/rockchip: add DRM_BRIDGE_ATTACH_NO_CONNECTOR flag to drm_bridge_attach
commit: 2e87bf389e1396b9f1360e1a7cdc27f423f56463
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--
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ux/phy/phy.h
commit: d90def98f90fb166191f19b41620e1a54b6dac75
Best regards,
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]
Applied, thanks!
[1/1] drm/rockchip: handle non-platform devices in
rockchip_drm_endpoint_is_subdriver
commit: 37825e07ab413187e1ea078bc33dcdb835008be2
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_resource()
commit: 61735698103fafb5bc0df4ab208fc140c27cabc6
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fractional clk change
commit: e93a3ccf76996df53ff6c2c03626b70bb0b0d55d
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ks!
[1/1] drm/rockchip: cdn-dp-core: Fix cdn_dp_resume unused warning
commit: f7c57a4566115657c16fd6603b6ef8a21bae5194
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Hi,
Am Mittwoch, 17. November 2021, 15:33:36 CET schrieb Sascha Hauer:
> From: Benjamin Gaignard
>
> Define a new compatible for rk3568 HDMI.
> This version of HDMI hardware block needs two new clocks hclk_vio and hclk
> to provide phy reference clocks.
>
> Signed-off-by: Benjamin Gaignard
>
Am Mittwoch, 8. Dezember 2021, 16:12:19 CET schrieb Sascha Hauer:
> "vpll" is a misnomer. A clock input to a device should be named after
> the usage in the device, not after the clock that drives it. On the
> rk3568 the same clock is driven by the HPLL.
> To fix that, this patch renames the vpll
s!
[1/5] dt-bindings: gpu: mali-bifrost: describe clocks for the rk356x gpu
commit: f1775c26e8b8809d922a29bb5e3df6ea503d2fa0
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383456452378de07e55fc687069d1898a567d
[5/5] arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
commit: 679f048a10d8322d79010e0e52f18a6c17bdf306
[6] arm64: dts: rockchip: enable the tsadc on rk3568-evb1-v10
Best regards,
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5/27] clk: rk3568: Add CLK_SET_RATE_PARENT to the HDMI reference clock
commit: 6e69052f01d9131388cfcfaee929120118a267f4
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this is due to my low quality cable.
>
> [...]
Applied, thanks!
[18/27] arm64: dts: rockchip: rk3399: reorder hmdi clocks
commit: 2e8a8b5955a000cc655f7e368670518cbb77fe58
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in23_data[] .format field:
>
> RK3288's format: VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1)
> RK3368's format: VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5)
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: vop: Correct RK3399 VOP register fields
commit: 9da1e9ab82c92d0e89fe44cad2cd7c2d18d64070
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tch RK3399-Gru DP to SPDIF output
commit: b5fbaf7d779f5f02b7f75b080e7707222573be2a
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--
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ght-forward patches for now.
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size_t and the
> negative error code becomes a high unsigned value and is treated as
> success. Add a cast to fix this.
>
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: Fix type promotion bug in rockchip_gem_iommu_map()
commit: 6471da5ee311d53ef46eebcb7725bc94266cc0cf
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--
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b6fa0830125d91c2b4bc381eefd
[2/5] dt-bindings: panel: Add Powkiddy RGB30 panel compatible
commit: daee0320a13724e5a584726b693eee87bbd96172
[3/5] drm/panel: st7703: Add Powkiddy RGB30 Panel Support
commit: 636a989eb4d022e1756009592445aedaaf7424d8
Best regards,
--
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cdc7a7aebe8a7e3455946f5f
[5/5] arm64: dts: rockchip: add support for Powkiddy RGB30
commit: 1e9ac3e8a6a9d4da9efbad2d8e95cc1140e0e23f
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; burst mode.
>
>
Applied, thanks!
[1/1] drm/bridge: synopsys: dw-mipi-dsi: Fix hcomponent lbcc for burst mode
commit: 93e82bb4de0196c4caeca1d8a6eef67863981d8f
Best regards,
--
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] drm/rockchip: vop: Add NV15, NV20 and NV30 support
commit: d4b384228562848e4b76b608a5876c92160e993c
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--
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nt
drm/rockchip: vop: ...
drm/rockchip: vop2: ...
formats.
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Add PLL rate for 115.2MHz
commit: ccf59682a0287b81015dc1939203fac70b818c6b
I've gone forward and grabbed the PLL rate already, so it
can go together with the other rate addition from the fixes
series.
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TA6 variant
commit: e5f9d543419c78ac58f3b3557bc5a76b20ff600b
[3/3] dt-bindings: ltk050h3146w: add compatible for LTK050H3148W-CTA6 variant
commit: 29d8e38c36cb662331a833699c359ec1af1edbec
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ed to drm_dbg_kms
commit: eb23cffdd7f085149799e5eda12a9aff792cc34d
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thanks!
[1/1] drm/rockchip: cdn-dp: Fix some error handling paths in cdn_dp_probe()
commit: 44b968d0d0868b7a9b7a5c64464ada464ff4d532
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>
Applied, thanks!
[1/1] drm/rockchip: vop2: Convert to use maple tree register cache
commit: 3d59c22bbb8d03f3f14e6d0845d44c146fb48f35
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n
> possibly do is to save a few bytes of .text if a driver can be used both
> with and without it. Hence we remove of_match_ptr.
>
> [...]
Applied, thanks!
[1/1] drm/rockchip: remove redundant of_match_ptr
commit: 63a06c9fe30bf84d1ab6f07d0e408bd1d4ccaf85
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kchip: dsi: Use devm_platform_get_and_ioremap_resource()
commit: 253a1d33e5cfdf62525f5d6ed2bf03acbadd1582
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2006e3064ce9230881ece
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capable of driving both hdmi and dsi with their relevant
deficiencies being in terms of resolution or clock rates I guess, so
anything related to selecting a matching VOP should be done in code in
the kernel.
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--
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On Mon, 9 May 2022 12:05:05 +0300, Dan Carpenter wrote:
> This error path needs an unlock before returning.
Applied, thanks!
[1/1] drm/rockchip: vop2: unlock on error path in vop2_crtc_atomic_enable()
commit: 98526c5bbe3267d447ddd076b685439e3e1396c6
Best regards,
--
Heiko Stuebner
: 54eb8d446e710b5f77969bd34f0a162cf86b8d29
[2/3] drm: rockchip: Change register space names
commit: 5ee8c8f930ba7d20717c4fc2d9f1ce0e757d1155
Best regards,
--
Heiko Stuebner
mi tx on quartz64a
commit: 97d7309a70b03d01a154c4308f423b020f7d397e
[20/24] arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a
commit: 281f94d9cbac31c1c112d09883bc42021435f1ad
Best regards,
--
Heiko Stuebner
to
[16/24] arm64: dts: rockchip: rk356x: Add VOP2 nodes
commit: 9b3c9f6e57ef26b8478da64e3d49d0438291a98a
Best regards,
--
Heiko Stuebner
Am Freitag, 22. April 2022, 09:28:17 CEST schrieb Sascha Hauer:
> It's v11 time. There's only one small change to v10. Discussion seems to
> have settled now. Is there anything left that prevents the series from
> being merged? I'd really like to have it in during the next merge
> window.
>
>
Hi Rob, Krzysztof,
Am Mittwoch, 11. Mai 2022, 10:21:07 CEST schrieb Sascha Hauer:
> The VOP2 driver relies on reg-names properties, but these are not
> documented. Add the missing documentation, make reg-names mandatory
> and increase minItems to 2 as always both register spaces are needed.
>
>
Hi,
Am Freitag, 13. Mai 2022, 15:53:41 CEST schrieb Colin Ian King:
> There is a spelling mistake in a drm_err message. Fix it.
>
> Signed-off-by: Colin Ian King
didn't you sent the same patch some days ago already?
Which is applied to drm-misc-next in [0].
Just want to make sure I didn't
Am Freitag, 24. Juni 2022, 19:57:53 CEST schrieb Brian Norris:
> On Fri, Jun 24, 2022 at 12:23 AM Heiko Stuebner wrote:
> > The interesting question would be, do we want some fixes tag for it?
>
> I'm not aware of any currently-upstream code that will hit this [1].
> I've hit
th a WARN_ON() instead of crashing, so let's do that here too.
Applied, thanks!
[1/1] drm/rockchip: vop: Don't crash for invalid duplicate_state()
commit: 1449110b0dade8b638d2c17ab7c5b0ff696bfccb
Best regards,
--
Heiko Stuebner
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