"Sottek, Matthew J" wrote:
>
> >> No impact whatsoever. I specifically didn't touch ANY device
> >> independent code. It is all contained within the i810's driver.
>
> >Have you gotten any feedback from developers working with any other UMA
> >architectures (Sis or Savage for example)?
>
> The
>> No impact whatsoever. I specifically didn't touch ANY device
>> independent code. It is all contained within the i810's driver.
>Have you gotten any feedback from developers working with any other UMA
>architectures (Sis or Savage for example)?
The only feedback I've gotten is from this list
Matt,
I have two questions regarding shared AGP memory. The first is
inline--the correlary to Ian's question. The second question is at the
end--it's more open ended.
"Sottek, Matthew J" wrote:
>
> >This seems reasonable enough, but I'll have to think about it more
> >and learn a bit more abo
>This seems reasonable enough, but I'll have to think about it more
>and learn a bit more about the AGP implementation to fully grok it.
>On question I do have is what impact will this have (if any) on
>chipsets that aren't UMA?
No impact whatsoever. I specifically didn't touch ANY device indepen
> The problem:
> The agpgart usage model is not well suited for UMA architectures because
> each gart user is expected to allocate memory and only bind it into
> the gart while it is active. Therefore on systems where all graphics
> memory is obtained from the gart a huge amount of system memory i
"Sottek, Matthew J" wrote:
>
> I posted a RFC about a new type of "Shared" agp memory a while back
> but didn't get any input. I thought I would try again since there has
> been better communication as of late, and the idea has progressed
> somewhat.
>
> The problem:
> The agpgart usage model is
