Original-Nachricht
> Datum: Mon, 03 Mar 2008 09:56:09 +1100
> Von: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> An: Gerhard Pircher <[EMAIL PROTECTED]>
> CC: [EMAIL PROTECTED], dri-devel@lists.sourceforge.net, [EMAIL PROTECTED],
> [EMAIL PROTECTED]
> Betreff: Re: [BUG/RFC/PATCH]
Original-Nachricht
> Datum: Tue, 04 Mar 2008 07:44:11 +1100
> Von: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> An: Gerhard Pircher <[EMAIL PROTECTED]>
> CC: [EMAIL PROTECTED], [EMAIL PROTECTED], dri-devel@lists.sourceforge.net,
> [EMAIL PROTECTED]
> Betreff: Re: [BUG/RFC/PATCH]
>-Original Message-
>From: Jesse Barnes [mailto:[EMAIL PROTECTED]
>Sent: 2008年3月4日 3:20
>To: dri-devel@lists.sourceforge.net
>Cc: Nan hai Zou
>Subject: Re: drm: Branch 'master'
>
>On Sunday, March 02, 2008 10:17 pm Nan hai Zou wrote:
>> shared-core/i915_irq.c |7 +++
>> 1 file chan
Alfredo Matas escreveu:
> El lun, 03-03-2008 a las 02:07 -0300, Tiago Vignatti escribió:
>> I quoted this in Xorg wiki, if you don't mind :)
>
> I'm also very interested in learning how contribute to this proyect.
> Could you send the url of this page?. I have been searching this section
> in the
Jesse Barnes wrote:
> On Monday, March 03, 2008 10:34 am Thomas Hellström wrote:
>
>> 1) Allocating all pages at once:
>> Yes, I think this might improve performance in some cases. The reason
>> it hasn't been done already is the added complexity needed to keep track
>> of the different alloca
Keith Packard wrote:
> On Mon, 2008-03-03 at 19:34 +0100, Thomas Hellström wrote:
>
>
>
>> 2) Copying buffers in drm. This is to avoid vma creation and pagefaults,
>> right? Yes, that could be an improvement *if* kmap_atomic is used to
>> provide the kernel mapping. Doing vmap on a whole bu
Eric Anholt wrote:
> On Fri, 2008-02-29 at 16:03 +0100, Thomas Hellström wrote:
>
>> Hi.
>>
>> I've pushed the intel-post-reloc branch with the following stuff:
>>
>> 1) Full backwards compatibility.
>> 2) A new reloc type 1, which is applied _after_ all validations and with
>> slightly differe
apologies for top posting, but Thomas's email appears to be breaking
alpine (html or something encoding)
The big area where we win with CACHED_MAPPED is pixmaps for 2D operations.
a) we can't know in advance if we should allocate pixmaps as cached or
uncached.
b) we can't know if we are going
Dave Airlie wrote:
> apologies for top posting, but Thomas's email appears to be breaking
> alpine (html or something encoding)
>
> The big area where we win with CACHED_MAPPED is pixmaps for 2D operations.
>
> a) we can't know in advance if we should allocate pixmaps as cached or
> uncached.
On Tue, 2008-03-04 at 17:34 +0100, Thomas Hellström wrote:
>
> Hmm, Yes this is a tricky case. Doesn't Intel's coherent GART,
> DRM_BO_FLAG_CACHED, work here? I suspect it'd be a bit slow though.
No, the restrictions on coherent mappings make this mode effectively
useless. So, pixmaps need to
Keith Packard wrote:
> On Tue, 2008-03-04 at 17:34 +0100, Thomas Hellström wrote:
>
>>
>> Hmm, Yes this is a tricky case. Doesn't Intel's coherent GART,
>> DRM_BO_FLAG_CACHED, work here? I suspect it'd be a bit slow though.
>>
>
> No, the restrictions on coherent mappings make this mode
On Fri, 2008-02-29 at 11:08 +0100, Thomas Hellström wrote:
> Eric Anholt wrote:
> > On Thu, 2008-02-28 at 10:08 +0100, Thomas Hellström wrote:
> >
> >> Eric Anholt wrote:
> >>
> >>> On Thu, 2008-02-28 at 06:08 +1000, Dave Airlie wrote
> >> Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS.
On Tue, 2008-03-04 at 19:27 +0100, Thomas Hellström wrote:
> Keith Packard wrote:
> > On Tue, 2008-03-04 at 17:34 +0100, Thomas Hellström wrote:
> >
> >>
> >> Hmm, Yes this is a tricky case. Doesn't Intel's coherent GART,
> >> DRM_BO_FLAG_CACHED, work here? I suspect it'd be a bit slow thou
Eric Anholt wrote:
>
>> c) User-space bo-caching and reuse.
>> d) User-space buffer pools.
>>
>> TG is heading down the d) path since it also fixes the texture
>> granularity problem.
>>
>
> There's no texture granularity problem on Intel, right, given that we
> have a fixed mipmap layout? O
http://bugs.freedesktop.org/show_bug.cgi?id=9200
Michael Fu <[EMAIL PROTECTED]> changed:
What|Removed |Added
Severity|normal |enhancement
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http://bugs.freedesktop.org/show_bug.cgi?id=14656
--- Comment #3 from haihao <[EMAIL PROTECTED]> 2008-03-04 17:54:41 PST ---
*** Bug 14617 has been marked as a duplicate of this bug. ***
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http://bugs.freedesktop.org/show_bug.cgi?id=14617
haihao <[EMAIL PROTECTED]> changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
http://bugs.freedesktop.org/show_bug.cgi?id=14656
--- Comment #4 from haihao <[EMAIL PROTECTED]> 2008-03-04 18:12:37 PST ---
This issue can be reproduced with a single texture unit
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This patch fixes bits of the DRM so to make the radeon DRI work on
non-cache coherent PCI DMA variants of the PowerPC processors.
It moves the few places that needs change to wrappers to that
other architectures with similar issues can easily add their
own changes to those wrappers, at least until
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