On 2018/11/13 4:43, Cristian Sicilia wrote:
> Align parameters to the opened parentesis.
>
> Signed-off-by: Cristian Sicilia
Reviewed-by: Chao Yu
Thanks,
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On 2018/11/13 4:43, Cristian Sicilia wrote:
> Replace equal to NULL with logic unary operator,
> and removing not equal to NULL comparison.
>
> Signed-off-by: Cristian Sicilia
Reviewed-by: Chao Yu
Thanks,
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On 2018/11/13 4:43, Cristian Sicilia wrote:
> Comparisons should place the constant
> on the right side of the test.
>
> Signed-off-by: Cristian Sicilia
Reviewed-by: Chao Yu
Thanks,
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On Thu, Nov 15, 2018 at 02:33:49PM -0800, Andrew Morton wrote:
> On Mon, 12 Nov 2018 09:37:51 + chouryzhou(周威)
> wrote:
>
> > Currently android's binder is not isolated by ipc namespace. Since binder
> > is a form of IPC and therefore should be tied to ipc namespace. With this
> > patch,
On Mon, 12 Nov 2018 09:37:51 + chouryzhou(周威)
wrote:
> Currently android's binder is not isolated by ipc namespace. Since binder
> is a form of IPC and therefore should be tied to ipc namespace. With this
> patch, we can run multiple instances of android container on one host.
>
> This
On Fri, 2018-11-02 at 23:16 +0100, Pavel Machek wrote:
> On Wed 2018-10-10 19:22:47, Lubomir Rintel wrote:
> > It doesn't make sense to always have this built-in, e.g. on ARM
> > multiplatform kernels. A better way to address the problem the
> > original
> > commit aimed to solve is to fix
On Sun, 2018-11-04 at 13:37 +0100, Pavel Machek wrote:
> On Wed 2018-10-10 19:22:57, Lubomir Rintel wrote:
> > Avoid using the x86 OLPC platform specific call to get the board
> > version. It won't work on FDT-based ARM MMP2 platform.
> >
> > Signed-off-by: Lubomir Rintel
> > Reviewed-by: Andy
On Fri, 2018-10-19 at 16:45 +0300, Andy Shevchenko wrote:
> On Wed, Oct 10, 2018 at 8:23 PM Lubomir Rintel
> wrote:
> > Avoid using the x86 OLPC platform specific call to get the board
> > version. It won't work on FDT-based ARM MMP2 platform.
> >
> > Signed-off-by: Lubomir Rintel
> > ---
> >
On Thu, Nov 15, 2018 at 01:01:17PM +0100, David Hildenbrand wrote:
> Just saying that "I'm not the first to do it, don't hit me with a stick" :)
:-)
> Indeed. And we still have without makedumpfile. I think you are aware of
> this, but I'll explain it just for consistency: PG_hwpoison
No, I
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Add the H5-specific system control node description to its device-tree
> with support for the SRAM C1 section, that will be used by the video
> codec node later on.
>
> Signed-off-by: Paul Kocialkowski
> ---
>
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Add the description for the SRAM C1 section to the A64 device-tree.
>
> Signed-off-by: Paul Kocialkowski
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Just like the A64 and H5, the H3 SoC uses the system control block
> to enable the EMAC clock.
>
> Add a variant structure definition for the H3 and use it over the A10
> one. This will allow using the H3-specific binding for the
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Unlike in previous generations, the system-control register range is not
> limited to a size of 0x30 on the H3. In particular, the EMAC clock
> configuration register (accessed through syscon) is at offset 0x30 in
> that range.
>
>
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> This cosmetic change removes the heading 0 in the video-codec unit
> address, as it's done for other nodes.
>
> Signed-off-by: Paul Kocialkowski
Other than the subject format we can fix when applying,
Acked-by: Chen-Yu Tsai
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> This cosmetic change removes the heading 0 in the video-codec unit
> address, as it's done for other nodes.
>
> Signed-off-by: Paul Kocialkowski
Nit: I'd prefer the subject prefix format be ": : ... ",
or "sun8i: a33:" in this case.
On Thu, Nov 15, 2018 at 10:51 PM Paul Kocialkowski
wrote:
>
> This adds nodes for the Video Engine and the associated reserved memory
> for the H5. Up to 96 MiB of memory are dedicated to the CMA pool.
>
> The pool is located at the end of the first 256 MiB of RAM so that the
> VPU can access it.
This adds nodes for the Video Engine and the associated reserved memory
for the A64. Up to 96 MiB of memory are dedicated to the CMA pool.
The pool is located at the end of the first 256 MiB of RAM so that the
VPU can access it. It is unclear whether this is still a hard
requirement for this
Just like the A64 and H5, the H3 SoC uses the system control block
to enable the EMAC clock.
Add a variant structure definition for the H3 and use it over the A10
one. This will allow using the H3-specific binding for the syscon node
attached to the EMAC instead of the generic syscon binding.
Add the necessary compatible for supporting the A64 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git
Unlike in previous generations, the system-control register range is not
limited to a size of 0x30 on the H3. In particular, the EMAC clock
configuration register (accessed through syscon) is at offset 0x30 in
that range.
Extend the register size to its full range (0x1000) as a result.
This adds nodes for the Video Engine and the associated reserved memory
for the H5. Up to 96 MiB of memory are dedicated to the CMA pool.
The pool is located at the end of the first 256 MiB of RAM so that the
VPU can access it. It is unclear whether this is still a hard
requirement for this
This introduces a new compatible for the A64 SRAM C1 section, that is
compatible with the SRAM C1 section as found on the A10.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
This adds the H5 SoC compatible to the list of device-tree matches for
the SRAM driver. Since the variant is the same as the A64 (that precedes
the H5), the same variant description is used.
Signed-off-by: Paul Kocialkowski
---
drivers/soc/sunxi/sunxi_sram.c | 4
1 file changed, 4
This introduces two new compatibles for the cedrus driver, for the
A64 and H5 platforms.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/media/cedrus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/cedrus.txt
Add the necessary compatible for supporting the H5 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git
Now that we have specific nodes for the H3 and H5 system-controller
that allow proper access to the EMAC clock configuration register,
we no longer need a common dummy syscon node.
Switch the syscon label over to each platform's dtsi file.
Signed-off-by: Paul Kocialkowski
---
Add the description for the SRAM C1 section to the A64 device-tree.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
This introduces new bindings for the H5 SoC in the SRAM controller.
Because the SRAM layout is different from other SoCs, no backward
compatibility is assumed with any of them.
However, the C1 SRAM section alone looks similar to previous SoCs,
so it is compatible with the initial A10 binding.
This cosmetic change removes the heading 0 in the video-codec unit
address, as it's done for other nodes.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi
Add the H5-specific system control node description to its device-tree
with support for the SRAM C1 section, that will be used by the video
codec node later on.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 22
1 file changed, 22
This series adds support for the Allwinner H5 and A64 platforms to the
cedrus stateless video codec driver, with minor fixes to H3 support.
It requires changes to the SRAM driver bindings and driver, to properly
support the H5 and the A64 C1 SRAM section. Because a H5-specific
system-control node
This cosmetic change removes the heading 0 in the video-codec unit
address, as it's done for other nodes.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-a33.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi
On Sun, Nov 11, 2018 at 9:42 AM Jonathan Cameron wrote:
>
> On Fri, 9 Nov 2018 20:00:40 -0200
> Matheus Tavares wrote:
>
> > The ad2s90 driver currently sets some spi settings (max_speed_hz and
> > mode) at ad2s90_probe. This should, instead, be handled via device tree.
> > This patch removes
We initially introduced a spin lock to ensure that the VPU registers
are not accessed concurrently between our setup function and IRQ
handler. Because the V4L2 M2M API only allows one job to run at a time
and our jobs are completed following the IRQ handler, there is actually
no chance of an
On Thu, Nov 15, 2018 at 08:16:03AM +, Ardelean, Alexandru wrote:
> On Wed, 2018-11-14 at 23:16 +0530, Nishad Kamdar wrote:
> > Add device tree table for matching vendor ID.
> >
>
> This could have been just one patch.
> Something like
>[PATCH v4] staging: iio: ad7816: Add device tree
On Thu, Nov 15, 2018 at 01:11:02PM +0100, Michal Hocko wrote:
> I am not familiar with kexec to judge this particular patch but we
> cannot simply define any range for these pages (same as for hwpoison
> ones) because they can be almost anywhere in the available memory range.
> Then there can be
On 15.11.18 13:23, Michal Hocko wrote:
> On Wed 14-11-18 22:17:04, David Hildenbrand wrote:
> [...]
>> diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c
>> index b0308a2c6000..01db1d13481a 100644
>> --- a/kernel/power/snapshot.c
>> +++ b/kernel/power/snapshot.c
>> @@ -1222,7 +1222,7
On Wed 14-11-18 22:17:04, David Hildenbrand wrote:
[...]
> diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c
> index b0308a2c6000..01db1d13481a 100644
> --- a/kernel/power/snapshot.c
> +++ b/kernel/power/snapshot.c
> @@ -1222,7 +1222,7 @@ static struct page
[Cc Konstantin - the patch is
http://lkml.kernel.org/r/20181114211704.6381-3-da...@redhat.com]
On Thu 15-11-18 10:21:13, David Hildenbrand wrote:
> On 15.11.18 03:07, Mike Rapoport wrote:
> > On Wed, Nov 14, 2018 at 11:49:15PM +0100, David Hildenbrand wrote:
> >> On 14.11.18 23:23, Matthew
On Thu 15-11-18 12:52:13, Borislav Petkov wrote:
> On Thu, Nov 15, 2018 at 12:20:40PM +0100, David Hildenbrand wrote:
> > Sorry to say, but that is the current practice without which
> > makedumpfile would not be able to work at all. (exclude user pages,
> > exclude page cache, exclude buddy
On 15.11.18 12:52, Borislav Petkov wrote:
> On Thu, Nov 15, 2018 at 12:20:40PM +0100, David Hildenbrand wrote:
>> Sorry to say, but that is the current practice without which
>> makedumpfile would not be able to work at all. (exclude user pages,
>> exclude page cache, exclude buddy pages). Let's
On Thu, Nov 15, 2018 at 12:20:40PM +0100, David Hildenbrand wrote:
> Sorry to say, but that is the current practice without which
> makedumpfile would not be able to work at all. (exclude user pages,
> exclude page cache, exclude buddy pages). Let's not reinvent the wheel
> here. This is how
On 15.11.18 12:10, Borislav Petkov wrote:
> On Thu, Nov 15, 2018 at 02:19:23PM +0800, Dave Young wrote:
>> It would be good to copy some background info from cover letter to the
>> patch description so that we can get better understanding why this is
>> needed now.
>>
>> BTW, Lianbo is working on
On Thu, Nov 15, 2018 at 02:19:23PM +0800, Dave Young wrote:
> It would be good to copy some background info from cover letter to the
> patch description so that we can get better understanding why this is
> needed now.
>
> BTW, Lianbo is working on a documentation of the vmcoreinfo exported
>
On Wed, 2018-11-14 at 23:16 +0530, Nishad Kamdar wrote:
> Add device tree table for matching vendor ID.
>
This could have been just one patch.
Something like
[PATCH v4] staging: iio: ad7816: Add device tree table.
It's no longer a series, because the other patches were applied already.
I
On 15.11.18 07:19, Dave Young wrote:
> Hi David,
>
> On 11/14/18 at 10:17pm, David Hildenbrand wrote:
>> Let's export PG_offline via PAGE_OFFLINE_MAPCOUNT_VALUE, so
>> makedumpfile can directly skip pages that are logically offline and the
>> content therefore stale.
>
> It would be good to copy
On 15.11.18 03:07, Mike Rapoport wrote:
> On Wed, Nov 14, 2018 at 11:49:15PM +0100, David Hildenbrand wrote:
>> On 14.11.18 23:23, Matthew Wilcox wrote:
>>> On Wed, Nov 14, 2018 at 10:17:00PM +0100, David Hildenbrand wrote:
Rename PG_balloon to PG_offline. This is an indicator that the page
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