[PATCH AUTOSEL 6.1 3/7] x86/hyperv: Use slow_virt_to_phys() in page transition hypervisor callback

From: Michael Kelley [ Upstream commit 9fef276f9f416a1e85eb48d3bd38e6018a220bf5 ] In preparation for temporarily marking pages not present during a transition between encrypted and decrypted, use slow_virt_to_phys() in the hypervisor callback. As long as the PFN is correct, slow_virt_to_phys() w

[PATCH AUTOSEL 6.6 04/12] x86/hyperv: Allow 15-bit APIC IDs for VTL platforms

From: Saurabh Sengar [ Upstream commit 0d63e4c0ebc2b5c329babde44fd61d3f08db814d ] The current method for signaling the compatibility of a Hyper-V host with MSIs featuring 15-bit APIC IDs relies on a synthetic cpuid leaf. However, for higher VTLs, this leaf is not reported, due to the absence of

[PATCH AUTOSEL 6.6 03/12] x86/hyperv: Use slow_virt_to_phys() in page transition hypervisor callback

From: Michael Kelley [ Upstream commit 9fef276f9f416a1e85eb48d3bd38e6018a220bf5 ] In preparation for temporarily marking pages not present during a transition between encrypted and decrypted, use slow_virt_to_phys() in the hypervisor callback. As long as the PFN is correct, slow_virt_to_phys() w

[PATCH AUTOSEL 6.7 04/14] x86/hyperv: Allow 15-bit APIC IDs for VTL platforms

From: Saurabh Sengar [ Upstream commit 0d63e4c0ebc2b5c329babde44fd61d3f08db814d ] The current method for signaling the compatibility of a Hyper-V host with MSIs featuring 15-bit APIC IDs relies on a synthetic cpuid leaf. However, for higher VTLs, this leaf is not reported, due to the absence of

[PATCH AUTOSEL 6.7 03/14] x86/hyperv: Use slow_virt_to_phys() in page transition hypervisor callback

From: Michael Kelley [ Upstream commit 9fef276f9f416a1e85eb48d3bd38e6018a220bf5 ] In preparation for temporarily marking pages not present during a transition between encrypted and decrypted, use slow_virt_to_phys() in the hypervisor callback. As long as the PFN is correct, slow_virt_to_phys() w