",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
7482 needs more detail clock settings combination,
then, there is no method to adjust to it.
We need to consider such system somehow.
Thank you for your help !!
Best regards
---
Kuninori Morimoto
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= <&cpg CPG_MOD 1005>,
...
<&audio_clk_a>, <&cs2000>,
-<&audio_clk_c>,
+ <&adv748x>,
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
Th
