Re: [PATCH v2 2/2] staging: rtl8723au: core: remove redundant endianness conversion

2015-06-07 Thread Dan Carpenter
On Sat, Jun 06, 2015 at 05:34:00PM -0700, David Decotigny wrote: Source and destination have the same little-endian annotation: this patch removes forced conversion from host byte order to little-endian. The patch seems correct but the changelog is a bit wrong. It will change it from little

[PATCH v2 2/2] staging: rtl8723au: core: remove redundant endianness conversion

2015-06-07 Thread David Decotigny
Source and destination have the same little-endian annotation: this patch removes incorrect byte-swap on non-LE cpus. This addresses the following sparse warning: drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56: warning: incorrect type in argument 1 (different base types)

[PATCH v2 2/2] staging: rtl8723au: core: remove redundant endianness conversion

2015-06-06 Thread David Decotigny
Source and destination have the same little-endian annotation: this patch removes forced conversion from host byte order to little-endian. This addresses the following sparse warning: drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56: warning: incorrect type in argument 1 (different base