Hi,
On Mon 14 Dec 20, 12:39, Maxime Ripard wrote:
> On Fri, Dec 11, 2020 at 04:57:02PM +0100, Paul Kocialkowski wrote:
> > +#define sun6i_mipi_csi2_subdev_video(subdev) \
> > + container_of(subdev, struct sun6i_mipi_csi2_video, subdev)
> > +
> > +#define sun6i_mipi_csi2_video_dev(video) \
> > +
On Fri, Dec 11, 2020 at 04:57:02PM +0100, Paul Kocialkowski wrote:
> +#define sun6i_mipi_csi2_subdev_video(subdev) \
> + container_of(subdev, struct sun6i_mipi_csi2_video, subdev)
> +
> +#define sun6i_mipi_csi2_video_dev(video) \
> + container_of(video, struct sun6i_mipi_csi2_dev, video)
The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
found on Allwinner SoCs such as the A31 and V3/V3s.
It is a standalone block, connected to the CSI controller on one side
and to the MIPI D-PHY block on the other. It has a dedicated address
space, interrupt line and clock.
It is
