On Thu, Dec 31, 2020 at 03:29:38PM +0100, Paul Kocialkowski wrote:
> Bits related to the interface data width are only applicable to the
> parallel interface and are irrelevant when the CSI controller is taking
> input from the MIPI CSI-2 controller.
>
> In prevision of adding support for this
Bits related to the interface data width are only applicable to the
parallel interface and are irrelevant when the CSI controller is taking
input from the MIPI CSI-2 controller.
In prevision of adding support for this case, set these bits
conditionally so there is no ambiguity. The conditional
