On Sat, Nov 24, 2018 at 1:21 AM NeilBrown wrote:
>
> On Mon, Nov 12 2018, Sergio Paracuellos wrote:
>
> > On Mon, Nov 12, 2018 at 08:40:10AM +1100, NeilBrown wrote:
> >> On Sun, Nov 11 2018, Greg KH wrote:
> >>
> >> > On Sun, Nov 04, 2018 at 11:49:26AM +0100, Sergio Paracuellos wrote:
> >> >>
On Mon, Nov 12 2018, Sergio Paracuellos wrote:
> On Mon, Nov 12, 2018 at 08:40:10AM +1100, NeilBrown wrote:
>> On Sun, Nov 11 2018, Greg KH wrote:
>>
>> > On Sun, Nov 04, 2018 at 11:49:26AM +0100, Sergio Paracuellos wrote:
>> >> This patch series parse remaining port info from device tree
On Mon, Nov 12, 2018 at 08:40:10AM +1100, NeilBrown wrote:
> On Sun, Nov 11 2018, Greg KH wrote:
>
> > On Sun, Nov 04, 2018 at 11:49:26AM +0100, Sergio Paracuellos wrote:
> >> This patch series parse remaining port info from device tree storing
> >> it in mt7621_pcie_port struct created for this.
On Sun, Nov 11 2018, Greg KH wrote:
> On Sun, Nov 04, 2018 at 11:49:26AM +0100, Sergio Paracuellos wrote:
>> This patch series parse remaining port info from device tree storing
>> it in mt7621_pcie_port struct created for this. It also performs a lot
>> of cleanups to get the driver in a good
On Sun, Nov 04, 2018 at 11:49:26AM +0100, Sergio Paracuellos wrote:
> This patch series parse remaining port info from device tree storing
> it in mt7621_pcie_port struct created for this. It also performs a lot
> of cleanups to get the driver in a good shape to give it a try to get
> mainlined.
This patch series parse remaining port info from device tree storing
it in mt7621_pcie_port struct created for this. It also performs a lot
of cleanups to get the driver in a good shape to give it a try to get
mainlined. All of this changes are only compile-tested.
Cleanups performed here:
-
