Hi Alan,
I saw that your socfpga driver doesn't support the partial reconfig
use case (not a big deal).
What I currently do for Zynq is if I'm doing a non-partial reconfig is
that I disable input
level shifters and assert *all* resets while reprogramming in my FPGA
manager .write_init() and
On Thu, 23 Jul 2015, Jason Gunthorpe wrote:
On Thu, Jul 23, 2015 at 02:55:52PM -0700, Moritz Fischer wrote:
Hi Alan,
I saw that your socfpga driver doesn't support the partial reconfig
use case (not a big deal).
What I currently do for Zynq is if I'm doing a non-partial reconfig is
On Thu, Jul 23, 2015 at 02:55:52PM -0700, Moritz Fischer wrote:
Hi Alan,
I saw that your socfpga driver doesn't support the partial reconfig
use case (not a big deal).
What I currently do for Zynq is if I'm doing a non-partial reconfig is
that I disable input
level shifters and assert
From: Alan Tull at...@opensource.altera.com
Add simple fpga bus. This is a bus that configures an fpga and its
bridges before populating the devices below it. This is intended
for use with device tree overlays.
Note that FPGA bridges are seen as reset controllers so no special
framework for