On Fri, Aug 7, 2020 at 9:43 AM Pedro Alves via Dwarf-Discuss
wrote:
>
> Hi there!
>
> On 7/31/20 1:17 AM, Tye, Tony via Dwarf-Discuss wrote:
> > For optimized code involving multiple address spaces it is possible to run
> > into cases where the location of a source language variable requires
> >
Hi there!
On 7/31/20 1:17 AM, Tye, Tony via Dwarf-Discuss wrote:
> For optimized code involving multiple address spaces it is possible to run
> into cases where the location of a source language variable requires multiple
> address spaces. For example, a source variable may be optimized and diff
A compiler may promote part of a variable to a scratch pad memory address space.
Thanks,
-Tony Tye
-Original Message-
From: Michael Eager
On 7/30/20 5:17 PM, Tye, Tony via Dwarf-Discuss wrote:
> For optimized code involving multiple address spaces it is possible to
> run into cases wher
Hello Michael,
Sorry for the late reply. I found the email in the spam folder today.
> >>> We'd also want an unbounded piece operator to describe partially
> registerized
> >>> unbounded arrays, but I have not worked that out in detail, yet, and
> >>> we're a
> bit
> >>> farther away from an im
Hi -
> Can you explain this more?
>
> DWARF handles the situation where part of a variable is in memory and part
> in a register or in multiple registers. When would you have a variable
> which was in multiple address spaces?
Remember the "how can a debugger WRITE safely to variables" discussio
On 7/30/20 5:17 PM, Tye, Tony via Dwarf-Discuss wrote:
For optimized code involving multiple address spaces it is possible to
run into cases where the location of a source language variable requires
multiple address spaces. For example, a source variable may be optimized
and different pieces ma
For optimized code involving multiple address spaces it is possible to run into
cases where the location of a source language variable requires multiple
address spaces. For example, a source variable may be optimized and different
pieces may be in different places including memory of multiple ad
On 7/20/20 8:24 AM, Metzger, Markus T wrote:
Hello Michael,
I tried submitting the proposal via the public comment function but I'm not sure
whether I succeeded. When I clicked on "Submit Comment" nothing happened.
I have not filled out the Section and Page fields as the proposal covers
multip
On 7/20/20 8:24 AM, Metzger, Markus T wrote:
Hello Michael,
We'd also want an unbounded piece operator to describe partially registerized
unbounded arrays, but I have not worked that out in detail, yet, and we're a bit
farther away from an implementation.
Can you describe this more?
Conside
Hello Michael,
> > I have a write-up ready but wanted to wait until we have a public
> implementation.
> > Is that the right order? Or would you rather want to review proposals right
> away.
>
> I'm not sure what a SIMD lane is. There are a number of architectures
> which support SIMD, such as
On 7/20/20 1:31 AM, Metzger, Markus T via Dwarf-Discuss wrote:
I found DW_AT_address_class, which allows attaching an integer, which
could represent the address-space. This sounds pretty close. I’m a bit
thrown off by the example, though.
Which example?
Table 2.7 "Example address class co
Hello Todd,
> They use DW_AT_address_class with a CUDA-specific enum of address spaces,
> with
> values for things like: global memory, shared memory, const memory, etc. They
> don't attach these attributes to subroutines, because all the code on that
> architecture is in a single "code" memory.
On 7/20/20 1:43 AM, Metzger, Markus T via Dwarf-Discuss wrote:
I also have a small proposal for describing locations as function of the SIMD
lane by
adding a DW_OP_push_simd_lane operator and introducing stack variants for piece
operators.
I have a write-up ready but wanted to wait until we
Markus,
My experience with an architecture like this also is a GPU: the Nvidia CUDA
GPUs. I don't work on nvcc. I'm coming at this from the consumer side. But
what I've observed:
They use DW_AT_address_class with a CUDA-specific enum of address spaces, with
values for things like: global memor
Hello Michael,
> https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html
> >
> > AFAIK, these changes will be made to LLVM and there is interest in adding to
> the DWARF standard eventually.
>
> As mentioned in the past, I would be pleased to see proposals submitted
> for these ch
Hello Michael,
> > What would be the recommended way to model variables that are allocated
> > to different address spaces?
>
> Can you describe the architecture a bit?
It's a GPU. It uses a different address space for shared local memory.
> > I found DW_OPT_xderef for dereferencing address-s
On Thu, Jul 16, 2020 at 12:55 PM Michael Eager wrote:
> On 7/16/20 11:51 AM, David Blaikie wrote:
> >
> >
> > On Thu, Jul 16, 2020 at 11:41 AM Robinson, Paul via Dwarf-Discuss
> > The example that most often comes up is Harvard architectures. As it
> > happens, I think it's nearly always
On 7/16/20 11:51 AM, David Blaikie wrote:
On Thu, Jul 16, 2020 at 11:41 AM Robinson, Paul via Dwarf-Discuss
The example that most often comes up is Harvard architectures. As it
happens, I think it's nearly always obvious from context whether a given
address is data-segment or cod
ichael Eager via Dwarf-Discuss
> > Sent: Thursday, July 16, 2020 2:12 PM
> > To: todd.al...@concurrent-rt.com; Metzger, Markus T
> >
> > Cc: dwarf-discuss@lists.dwarfstd.org
> > Subject: Re: [Dwarf-Discuss] modeling different address spaces
> >
> > On 7/16/20 10
gt; Cc: dwarf-discuss@lists.dwarfstd.org
> Subject: Re: [Dwarf-Discuss] modeling different address spaces
>
> On 7/16/20 10:06 AM, Todd Allen via Dwarf-Discuss wrote:
> > Markus, Michael, David, Xing,
> >
> > I always assumed that the segment support in DWARF was meant to be mor
ject: Re: [Dwarf-Discuss] modeling different address spaces
>
> On 7/16/20 10:26 AM, John DelSignore via Dwarf-Discuss wrote:
> > FYI, Tony Tye and his team at AMD created a DWARF Proposal for
> heterogeneous debugging, which is generally useful but required to debug
> optimize
On 7/16/20 10:26 AM, John DelSignore via Dwarf-Discuss wrote:
FYI, Tony Tye and his team at AMD created a DWARF Proposal for heterogeneous
debugging, which is generally useful but required to debug optimized code for
GPUs. It directly addresses the issue of how to model different address spaces
On 7/16/20 10:06 AM, Todd Allen via Dwarf-Discuss wrote:
Markus, Michael, David, Xing,
I always assumed that the segment support in DWARF was meant to be more general,
and support architectures where there was no single flat memory, and so the
segments were necessary for memory accesses. I pers
FYI, Tony Tye and his team at AMD created a DWARF Proposal for heterogeneous
debugging, which is generally useful but required to debug optimized code for
GPUs. It directly addresses the issue of how to model different address spaces
and makes location descriptions first-class objects that can b
Markus, Michael, David, Xing,
I always assumed that the segment support in DWARF was meant to be more general,
and support architectures where there was no single flat memory, and so the
segments were necessary for memory accesses. I personally have not dealt with
any architectures where DW_AT_se
On 7/16/20 2:23 AM, Metzger, Markus T via Dwarf-Discuss wrote:
Hello,
What would be the recommended way to model variables that are allocated
to different address spaces?
Can you describe the architecture a bit?
I found DW_OPT_xderef for dereferencing address-space qualified pointers
but th
Hello,
What would be the recommended way to model variables that are allocated to
different address spaces?
I found DW_OPT_xderef for dereferencing address-space qualified pointers but
the resulting memory location description wouldn’t have an address-space
qualifier.
I found DW_AT_address_cl
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