On Wed, Oct 11, 2017 at 7:00 AM, Leonardo Amaral - Listas <lis...@leonardoamaral.com.br> wrote: > Hello List! > > In the issue https://github.com/luigirizzo/netmap/issues/355, Giuseppe made > this patch ( > https://github.com/luigirizzo/netmap/issues/355#issuecomment-331156069 ) > that fixed a bit the kernel panic issues and after this, he wrote the > following comment: > > " > > DD it is a flag in the receive descriptor of the ixgbe (the hardware > counterpart of the netmap slot). The datasheet says that when you see this > flag set, then there is a new packet in the slot. Apparently, this is not > always true. > " > > So its possible to provide documentation or information to allow this bug > to be properlly fixed - since to me, the best fix is to know the conditions > this DD flag is set or unset - as commented in comment > https://github.com/luigirizzo/netmap/issues/355#issuecomment-331445154 ? > > Thanks! > > https://github.com/luigirizzo/netmap/issues/355#issuecomment-331156069 > > > [image: --] > > Leonardo Amaral > [image: https://]about.me/leonardo.amaral > <https://about.me/leonardo.amaral?promo=email_sig&utm_source=email_sig&utm_medium=email_sig&utm_campaign=external_links> > ------------------------------------------------------------------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, Slashdot.org! http://sdm.link/slashdot > _______________________________________________ > E1000-devel mailing list > E1000-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/e1000-devel > To learn more about Intel® Ethernet, visit > http://communities.intel.com/community/wired
The bug is in netmap. It probably isn't keeping up with the rate of change in the drivers. Specifically we changed ixgbe_alloc_rx_buffers about 9 months ago so that it no longer clears the DD bit, but instead just focuses on clearing the length field and uses that to determine that a write back has occurred as we can avoid some unneeded barriers that way. The only limitation is that we can't use header-data split which we weren't using anyway so for us it is a win-win performance wise. If you want to use the DD bit you need to clear it yourself and then hardware will write it back to 1. If you don't clear it you are just going to find it is set to 1 most of the time not that it really matters if you aren't actually monitoring the bit. - Alex ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
