Re: [E1000-devel] CPU load balancing/distribution with 82576 and igb

2009-03-10 Thread Richard C. Hesse
Thanks for the reply Mitch. I knew that we had to use irqbalance with APIC-based interrupts, but didn't know that held true in the MSI-X world as well. Thanks for the info. -richard On Mar 10, 2009, at 10:07 AM, Williams, Mitch A wrote: >> What I'm seeing: All of the interrupts are landing o

Re: [E1000-devel] CPU load balancing/distribution with 82576 and igb

2009-03-10 Thread Williams, Mitch A
>What I'm seeing: All of the interrupts are landing on CPU0 and using >up too much time for my liking. I'd like to spread the interrupts >around some more, isn't this what having multiple queues is for? The >userland irqbalance is disabled for now, as I thought the >hardware and >driver we

[E1000-devel] CPU load balancing/distribution with 82576 and igb

2009-03-09 Thread Richard C. Hesse
Goal: Enable multiple receive queues so that my servers can scale beyond what a single can handle in terms of interrupts (hard and soft). Environment: ET dual port PCI-express cards (82576), CentOS 5.2 with 2.6.18-92.1.22.el5 kernel, Dell PowerEdge 1950 servers, nginx webserver/proxies, igb