On 12/7/2017 3:48 PM, Liming Gao wrote:
From: Michael Kinney
https://bugzilla.tianocore.org/show_bug.cgi?id=573
https://bugzilla.tianocore.org/show_bug.cgi?id=796
The same issue is reported again by GCC. Resend this patch again.
This patch renames the duplicated function name to fix it.
The S
On 12/7/2017 3:48 PM, Liming Gao wrote:
From: Michael Kinney
https://bugzilla.tianocore.org/show_bug.cgi?id=573
https://bugzilla.tianocore.org/show_bug.cgi?id=796
The same issue is reported again by GCC. Resend this patch again.
This patch renames the duplicated function name to fix it.
The S
From: Michael Kinney
https://bugzilla.tianocore.org/show_bug.cgi?id=573
https://bugzilla.tianocore.org/show_bug.cgi?id=796
The same issue is reported again by GCC. Resend this patch again.
This patch renames the duplicated function name to fix it.
The SecPeiDebugAgentLib uses the global variabl
Hi Gary,
IcmpErrorRcvToken is only used to get ICMP error from IP layer, and the data
will be copied to Mode->IcmpError. So, I think the RxData should be recycled.
Besides, EFI_IP_PROTO_ICMP should be also checked in the call function but
currently it's not:
if (!EFI_IP4_EQUAL (&RxData->He
Reviewed-by: Jordan Justen
On 2017-12-06 23:17:00, Ruiyu Ni wrote:
> The TFTP command was converted from a NULL class library instance to
> a dynamic shell command in commit 0961002352e9.
>
> The ShellLib and FileHandleLib resolutions are moved from
> Shell app to [LibraryClasses.common]
> beca
The TFTP command was converted from a NULL class library instance to
a dynamic shell command in commit 0961002352e9.
The ShellLib and FileHandleLib resolutions are moved from
Shell app to [LibraryClasses.common]
because dynamic shell commands implemented as DXE_DRIVER modules
also depend on these
Leif:
I don't see the core driver uses WatchdogTimer->RegisterHandler(). When it
returns unsupported, it means the additional handler can't be registered.
DxeCore uses WatchdogTimer->SetTimerPeriod(). This service is implemented in
your driver.
Watchdog protocol is defined in PI spec. Spec
On 12/7/2017 1:40 PM, Jian J Wang wrote:
v2:
a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE
EnableNullDetection()
DisableNullDetection()
to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is di
On 12/7/2017 1:40 PM, Jian J Wang wrote:
v2:
a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE
Current implementation uses following two methods
EnableNullDetection()
DisableNullDetection()
to enable/disable page 0. These two methods will check PCD
PcdNullPoint
It's is good to me.
Reviewed-by: Jiaxin Wu
Thanks,
Jiaxin
> -Original Message-
> From: Heyi Guo [mailto:heyi@linaro.org]
> Sent: Thursday, December 7, 2017 10:22 AM
> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org
> Cc: Heyi Guo ; Junbiao Hong
> ; Zeng, Star ; Dong, Eri
On 12/7/2017 1:40 PM, Jian J Wang wrote:
v2:
a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
b. Fix GCC49 build error
ue to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data
From: Yunhua Feng
Filter the FileList when multiple genfds thread options is not enabled.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng
---
BaseTools/Source/Python/GenFds/EfiSection.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Make VariableServiceSetVariable and VariableServiceQueryVariableInfo
functions return status following UEFI 2.7 spec.
Cc: Zhang Chao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: chenc2
---
.../Universal/Variable/RuntimeDxe/Variable.c | 26 --
> v2:
> a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE
Current implementation uses following two methods
EnableNullDetection()
DisableNullDetection()
to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the pag
> v2:
> a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE
EnableNullDetection()
DisableNullDetection()
to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact tha
> v2:
> a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
> b. Fix GCC49 build error
ue to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0. This macro is introduced t
> v2:
> a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
> b. Fix GCC49 build error
> c. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE
Due to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause leg
Yes, build pass is enough. Agree.
Please make sure all NASM related modules are built and linked. :-)
Thank you
Yao Jiewen
> -Original Message-
> From: Gao, Liming
> Sent: Thursday, December 7, 2017 11:44 AM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Dong, Eric
> Subject: RE: [ed
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Thursday, December 7, 2017 11:43 AM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric
> Subject: [edk2] [Patch] UefiCpuPkg: SmmCpuFeaturesLib A
Hi folks,
In PxeBcImpl.c, we have IcmpErrorListenHandler which seems to process ICMP
errors. But in EfiPxeBcStart function, we can see
Private->IcmpErrorRcvToken.Event is only a common event and Ip4->Receive is
called to receive IP4 packets. So will IcmpErrorListenHandler receive all IP4
packe
XCODE5 tool chain reports them. For this change, I think build pass is enough.
I send another patch to fix the missing ASM_PFX in SmmCpuFeaturesLib.
Thanks
Liming
>-Original Message-
>From: Yao, Jiewen
>Sent: Thursday, December 07, 2017 11:00 AM
>To: Gao, Liming ; edk2-devel@lists.01.or
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
Cc: Eric Dong
---
UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
b/UefiCpuPk
Hi Liming, Mike,
Please share your inputs on this.
Thanks,
Meenakshi
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Tuesday, December 05, 2017 4:36 PM
> To: Udit Kumar
> Cc: Gao, Liming ; Kinney, Michael D
> ; Meenakshi Aggarwal
> ; ard.biesheu...
Reviewed-by: Liming Gao
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Thursday, December 07, 2017 1:08 AM
>To: edk2-devel@lists.01.org
>Cc: Kinney, Michael D ; Gao, Liming
>; ard.biesheu...@linaro.org
>Subject: [PATCH] MdePkg: Arm/AArch64 - filter #prag
That will be in another patch. :)
Thanks,
Star
-Original Message-
From: Yao, Jiewen
Sent: Thursday, December 7, 2017 11:03 AM
To: Zeng, Star ; edk2-devel@lists.01.org
Cc: Dong, Eric ; Laszlo Ersek ; Ni,
Ruiyu
Subject: RE: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error
Good enhancement.
Reviewed-by: jiewen@intel.com
BTW: I think we should also ASSERT(FALSE) if StaticPage and Smmprofile are both
TRUE
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, December 7, 2017 9:49 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Yao, Jiewen ;
Pete:
This is the base step to enable VS2017 ARM tool chain. Then, user could use
it and build ARM application first.
Here, I have one question. VS2017 ARM requires 4096 alignment. So, why not
add /FILEALIGN:4096 into tools_def.txt as the default linker option for ARM?
Thanks
Liming
>-O
Reviewed-by: Eric Dong
-Original Message-
From: Zeng, Star
Sent: Thursday, December 7, 2017 9:49 AM
To: edk2-devel@lists.01.org
Cc: Zeng, Star; Yao, Jiewen; Dong, Eric; Laszlo Ersek; Ni, Ruiyu
Subject: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case
Only DumpCpuCont
I think so.
May I know how this is found? And how this is validated?
I think we need build the whole package to trigger all the failure, and fix all.
Thank you
Yao Jiewen
> -Original Message-
> From: Gao, Liming
> Sent: Thursday, December 7, 2017 10:53 AM
> To: Yao, Jiewen ; edk2-devel
Reviewed-by: Eric Dong
-Original Message-
From: Gao, Liming
Sent: Wednesday, December 6, 2017 4:02 PM
To: edk2-devel@lists.01.org
Cc: Dong, Eric; Zeng, Star
Subject: [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header
FvLength
Contributed-under: TianoCore Contributio
Do you mean SmmCpuFeaturesLib also has the similar issue? If yes, I will
provide the patch to fix it.
>-Original Message-
>From: Yao, Jiewen
>Sent: Thursday, December 07, 2017 10:52 AM
>To: Gao, Liming ; edk2-devel@lists.01.org
>Cc: Dong, Eric
>Subject: RE: [edk2] [Patch] UefiCpuPkg: Pi
Reviewed-by: Eric Dong
-Original Message-
From: Ni, Ruiyu
Sent: Thursday, December 7, 2017 10:49 AM
To: edk2-devel@lists.01.org
Cc: Dong, Eric; Shao, Ming
Subject: [PATCH] UefiCpuPkg/MtrrLib: Correct debug message
When printing the ascii format of memory attribute in debug message, %s w
Hi Liming
Reviewed-by: jiewen@intel.com
BTW: Do you think we also need update SmmCpuFeaturesLib ?
Thank you
Yao Jiewen
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Thursday, December 7, 2017 10:45 AM
> To: edk2-de
Reviewed-by: Eric Dong
You'd better add more background for the change when you check in.
Thanks,
Eric
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
Gao
Sent: Thursday, December 7, 2017 10:45 AM
To: edk2-devel@lists.01.org
Cc: Dong, Eri
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Wednesday, December 6, 2017 4:02 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric ; Zeng, Star
> Subject: [edk2] [Patch] UefiCpuPkg: Update
When printing the ascii format of memory attribute in debug message,
%s was used, but %a should be used.
The patch additionally changes %x to %r for EFI_STATUS.
The whole patch doesn't impact functionality of the MtrrLib.
Just debug message fix.
Contributed-under: TianoCore Contribution Agreement
Reviewed-by: Fu Siyuan
> -Original Message-
> From: Heyi Guo [mailto:heyi@linaro.org]
> Sent: Thursday, December 7, 2017 10:22 AM
> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org
> Cc: Heyi Guo ; Junbiao Hong ;
> Zeng, Star ; Dong, Eric ; Ni,
> Ruiyu ; Fu, Siyuan ; Wu, Jiax
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
Cc: Eric Dong
---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
b/UefiCpuPkg/PiSmmCpuDxeSmm/
Reviewed-by: Liming Gao
>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Yonghong Zhu
>Sent: Wednesday, December 06, 2017 6:13 PM
>To: edk2-devel@lists.01.org
>Subject: [edk2] [Patch 0/3] BaseTools: Fix some bugs about hash value enable
>
>This
Leif:
Could you also update ENCODE_WARNING() and RETURN_ERROR() to align to MdePkg?
Thanks
Liming
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Wednesday, December 06, 2017 12:10 AM
>To: edk2-devel@lists.01.org
>Cc: Zhu, Yonghong ; Gao, Liming
>
>Subje
When UEFI receives IPMP echo packets it will enter Ip4IcmpReplyEcho
function, and then call Ip4Output. However, if Ip4Output gets some
error and exits early, e.g. fails to find the route entry, memory
buffer of "Data" gets no chance to be freed and memory leak will be
caused. If there is such an at
Hi Ard,
I'm OK for the patch.
BTW, would you mind to help add the "-Wno-unused-const-variable" in the
CLANG38_WARNING_OVERRIDES? I happen to need add it in CLANG38
(https://bugzilla.tianocore.org/show_bug.cgi?id=790) and I see it seems a
shared flag for ARM/AARCH64 as well.
Steven Shi
Intel\SSG
Only DumpCpuContext in error case, otherwise there will be too many
debug messages from DumpCpuContext() when SmmProfile feature is enabled
by setting PcdCpuSmmProfileEnable to TRUE. Those debug messages are not
needed for SmmProfile feature as it will record those information to
buffer for further
Thanks Leif. I will provide patch to fix it soon.
Best Regards,
Zhu Yonghong
-Original Message-
From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
Sent: Thursday, December 07, 2017 2:24 AM
To: Zhu, Yonghong
Cc: edk2-devel@lists.01.org; Feng, YunhuaX ; Gao,
Liming
Subject: Re: [ed
On Wed, Dec 06, 2017 at 08:36:48PM +, Ard Biesheuvel wrote:
> On 6 December 2017 at 20:31, Leif Lindholm wrote:
> > Address an incorrect function prototype (using ; instead of ,)
> > in AndroidBootImg.h.
> >
> > Also restructure code slightly to avoid a "may be used uninitialized"
> > warning.
On 6 December 2017 at 14:14, Laszlo Ersek wrote:
> On 12/06/17 12:37, Ard Biesheuvel wrote:
>> In order to allow the ArmVirtPkg platforms to be built using the
>> NOOPT target, add it explicitly to the BUILD_TARGETS define.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-of
On 6 December 2017 at 20:31, Leif Lindholm wrote:
> Address an incorrect function prototype (using ; instead of ,)
> in AndroidBootImg.h.
>
> Also restructure code slightly to avoid a "may be used uninitialized"
> warning.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by
Address an incorrect function prototype (using ; instead of ,)
in AndroidBootImg.h.
Also restructure code slightly to avoid a "may be used uninitialized"
warning.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm
---
EmbeddedPkg/Include/Protocol/AndroidBootImg
Hi Yonghong,
I'm afraid I have come across an issue with this one as well:
When trying to build OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b
into a platform (edk2-platforms/Platform/Hisilicon/HiKey/), GenSec
fails with:
Generating FVMAIN FV
On Wed, Dec 06, 2017 at 11:39:17AM +, Ard Biesheuvel wrote:
> Extend the CLANG38 toolchain definition so it can be used for
> ARM and AARCH64 as well. Note that this requires llvm-ar and
> the LLVMgold.so linker plugin.
>
> In preparation of doing the same for GCC5, this toolchain version
> al
On 6 December 2017 at 17:07, Leif Lindholm wrote:
> clang, when used as a preprocessor for dtc, does not discard #pragma
> statements although -x assembler-with-cpp is specified. This causes dtc
> to barf at a #pragma pack() statement that is already filtered out for
> __GNUC__. So add a check to
clang, when used as a preprocessor for dtc, does not discard #pragma
statements although -x assembler-with-cpp is specified. This causes dtc
to barf at a #pragma pack() statement that is already filtered out for
__GNUC__. So add a check to also filter this out if __ASSEMBLER__.
Contributed-under:
On 6 December 2017 at 14:28, Laszlo Ersek wrote:
> On 12/06/17 15:16, Ard Biesheuvel wrote:
>> On 6 December 2017 at 14:12, Laszlo Ersek wrote:
>>> On 12/06/17 12:39, Ard Biesheuvel wrote:
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that t
On 12/06/17 15:16, Ard Biesheuvel wrote:
> On 6 December 2017 at 14:12, Laszlo Ersek wrote:
>> On 12/06/17 12:39, Ard Biesheuvel wrote:
>>> Extend the CLANG38 toolchain definition so it can be used for
>>> ARM and AARCH64 as well. Note that this requires llvm-ar and
>>> the LLVMgold.so linker plug
On 6 December 2017 at 14:12, Laszlo Ersek wrote:
> On 12/06/17 12:39, Ard Biesheuvel wrote:
>> Extend the CLANG38 toolchain definition so it can be used for
>> ARM and AARCH64 as well. Note that this requires llvm-ar and
>> the LLVMgold.so linker plugin.
>>
>> In preparation of doing the same for
On 12/06/17 12:37, Ard Biesheuvel wrote:
> In order to allow the ArmVirtPkg platforms to be built using the
> NOOPT target, add it explicitly to the BUILD_TARGETS define.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
> ---
> ArmVirtPkg/ArmVirtQemu.ds
On 12/06/17 12:39, Ard Biesheuvel wrote:
> Extend the CLANG38 toolchain definition so it can be used for
> ARM and AARCH64 as well. Note that this requires llvm-ar and
> the LLVMgold.so linker plugin.
>
> In preparation of doing the same for GCC5, this toolchain version
> also departs from the cus
Hi,
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 6:05 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Yao, Jiewen ; Dong, Eric ;
> Zeng, Star
> Subject: Re: [edk2] [PATCH v3 1/2] MdeModulePkg/DxeIpl: Mark page table as
> read-only
>
> On 12/5/2017 4:1
You're right that {} are not necessary. I'm wondering why I can't pass build
without them before.
They'll be removed in v2.
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 5:32 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Gao, Limin
Good catch. I think it's a typo not on purpose. Many thanks!
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 5:31 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Gao, Liming
>
> Subject: Re: [edk2] [PATCH 1/3] IntelFrameworkPkg/LegacyB
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.
In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them n
In order to allow the ArmVirtPkg platforms to be built using the
NOOPT target, add it explicitly to the BUILD_TARGETS define.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/ArmVirtQemu.dsc | 2 +-
ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
On 6 December 2017 at 03:33, Ni, Ruiyu wrote:
> Ard,
> I should have provided some of them in the last version.
> Sorry about that.
>
> We just found an internal/private SdMmcPciHc implementation
> developed by other teams. We are evaluating whether your
> proposed SdMmcOverride can be used to ret
Most of the RVCT assembly can be reused as is for MSFT except
for CpuBreakpoint.asm, which we need to force to Arm mode.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm | 5 -
MdePkg/Library/BaseLib/BaseLib.
VA_START, VA_END and VA_COPY are the same as the generic macros.
VA_ARG was reverse engineered from MS ARM assembly output.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
MdePkg/Include/Base.h | 13 +
1 file changed, 13 insertions(+)
diff --gi
We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
BaseTools/Conf/build_rule.template | 31 +++-
BaseTools/Co
Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh, memcpy and memset.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm | 255
We disable the exact same warnings as IA32 and X64.
Also create a dummy macro for PRESERVE8, as this is not supported by
the Microsoft ARM assembler.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
MdePkg/Include/Arm/ProcessorBind.h | 96 +++---
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard
---
MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf | 5 +++--
MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c | 18 ++
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a
This is a v2 of the previous patch, that takes into account the alignment
of suppressed level 4 warnings between IA32, X64 and ARM, and that also
removes compiler options that weren't actually needed.
The following series adds ARM compilation support for the VS2017 toolchain.
* PATCH 1 targets the
This patch enables hash value check for single module build to decide
whether we can skip to build this module.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/Python/build/build.py | 5 -
1 file changed, 4 insertions(+
This patches fix some bugs about hash value enable feature.
Yonghong Zhu (3):
BaseTools: Not cache the .efi file location into build option
BaseTools: back up the binary files when hash value is same
BaseTools: enable hash value check for single module build
BaseTools/Source/Python/AutoGen
We meet the case that first build with --hash option, then build it
again with --hash and --binary-destination option, since the hash value
is same, tool will not build the driver again, it cause the binary
files are not backed up.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreemen
We don't need cache the .efi file location into build option, otherwise
when we change the --binary-destination location, it would cause the
hash value is different.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/Python/Au
On 12/5/2017 4:16 PM, Jian J Wang wrote:
v3:
Remove the public definition of PAGE_TABLE_POOL_HEADER but keep similar
concept locally. CpuDxe has its own page table pool.
v2:
Introduce page table pool to ease the page table memory allocation and
protection, which replaces the di
On 12/6/2017 3:31 PM, Jian J Wang wrote:
Current implementation uses following two methods
EnableNullDetection()
DisableNullDetection()
to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due
On 12/6/2017 3:31 PM, Jian J Wang wrote:
Due to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0. This macro is introduced to make sure the
page 0 is enabled before those code
Handle CommSize OPTIONAL case for SmmCommunicate.
And return EFI_ACCESS_DENIED when CommunicationBuffer
is not valid for SMM to access.
Cc: Jiewen Yao
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdeModulePkg/Core/PiSmmCore/PiSmmCore.c |
Follow PI spec (>= 1.5) to add new return status code description
and make CommSize OPTIONAL.
Handle CommSize OPTIONAL case for SmmCommunicate.
And return EFI_ACCESS_DENIED when CommunicationBuffer
is not valid for SMM to access.
Cc: Jiewen Yao
Cc: Liming Gao
Cc: Michael D Kinney
Star Zeng (2
Follow PI spec (>= 1.5) to add new return status code description
and make CommSize OPTIONAL.
Cc: Jiewen Yao
Cc: Liming Gao
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/Protocol/MmCommunication.h | 14 --
> v4:
> Update related code using CPU_EXCEPTION_INIT_DATA_EX which has been
> changed to CPU_EXCEPTION_INIT_DATA.
> v3:
> a. Remove definition of EXCEPTION_STACK_SWITCH_DATA.
> Use CPU_EXCEPTION_INIT_DATA_EX defined in CpuExceptionHandlerLib.h
> intead.
> b. Call new API Initiali
> v4:
>
> v3:
>Newly added
Original API InitializeCpuExceptionHandlers is used in DxeMain to initialize
exception handlers but it does not support setting up stack switch required
by Stack Guard feature. Using the new API instead to make sure Stack Guard
feature is applicable to most part
> v3/v4:
>No change
> v2:
>Add code to save/restore GDTR, IDTR and TR for AP.
In current implementation of CPU MP service, AP is initialized with data
copied from BSP. Stack switch required by Stack Guard feature needs different
GDT, IDT table and task gates for each logic processor. This
> v4:
> a. Change name of new data structure from CPU_EXCEPTION_INIT_DATA_EX
> to CPU_EXCEPTION_INIT_DATA
> b. Add "size" field for all "buffer" fields in CPU_EXCEPTION_INIT_DATA
> c. Add separate fields for IA32 and X64 in CPU_EXCEPTION_INIT_DATA
> v3:
> a. Change InitializeCpuExceptionS
> v2/v3/v4:
>
Stack guard feature makes use of paging mechanism to monitor if there's a
stack overflow occurred during boot.
This patch will check setting of PCD PcdCpuStackGuard. If it's TRUE, DxeIpl
will setup page table and set the page at which the stack base locates to be
NOT PRESENT. If
> v4:
>
> v3:
>Move two general macros here from CpuExceptionHandlerLib
> v2:
>Add new definitions required by stack switch in IA32
The new definitions include two structures
IA32_TASK_STATE_SEGMENT
IA32_TSS_DESCRIPTOR
two macros
IA32_GDT_TYPE_TSS
IA32_GDT_ALIGNMENT
and o
> v2/v3/v4:
>
PcdCpuStackGuard is introduced to enable/disable Stack Guard feature.
Its value is FALSE by default. This feature is suggested to be enabled
only if the cpu driver and CpuExceptionHandlerLib have supported stack
switch for the processor used in platform. Otherwise the exception d
> v4:
>Change CPU_EXCEPTION_INIT_DATA_EX to CPU_EXCEPTION_INIT_DATA
> v3:
>Newly added
This patch add implementation of new API InitializeCpuExceptionHandlersEx
introduced into CpuExceptionHandlerLib on behalf of Stack Guard feature.
Cc: Star Zeng
Cc: Eric Dong
Cc: Jiewen Yao
Suggeste
> v4:
> a. Change name of new data structure from CPU_EXCEPTION_INIT_DATA_EX
> to CPU_EXCEPTION_INIT_DATA
> b. Add "size" field for all "buffer" fields in CPU_EXCEPTION_INIT_DATA
> c. Add separate fields for IA32 and X64 in CPU_EXCEPTION_INIT_DATA
> d. Change related code per changes in CPU
> v4:
>Change CPU_EXCEPTION_INIT_DATA_EX to CPU_EXCEPTION_INIT_DATA
> v3:
>Newly added
This patch add implementation of following new API introduced into
CpuExceptionHandlerLib. Since this lib hasn't support Stack Guard
and stack switch, the new method just calls original
InitializeCpuExc
> v4:
> Update related code using CPU_EXCEPTION_INIT_DATA_EX which has been
> changed to CPU_EXCEPTION_INIT_DATA.
> v3:
> a. Move more general definitions to BaseLib.h
> b. Update code to use new data structure CPU_EXCEPTION_INIT_DATA_EX
> c. Implement new API InitializeCpuExceptionHand
> v2/v3/v4:
>
Stack switch is required by Stack Guard feature. Following two PCDs are
introduced to simplify the resource allocation for initializing stack switch.
gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize
PcdCpuStackSwitc
Reviewed-by: Star Zeng
-Original Message-
From: Gao, Liming
Sent: Wednesday, December 6, 2017 4:02 PM
To: edk2-devel@lists.01.org
Cc: Dong, Eric ; Zeng, Star
Subject: [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header
FvLength
Contributed-under: TianoCore Contribut
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
Cc: Eric Dong
Cc: Star Zeng
---
UefiCpuPkg/SecCore/SecMain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
index 173bbfcfcb..c241d3
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