This patch updates PxeBcIcmpErrorDpcHandle() and PxeBcIcmp6ErrorDpcHandle() to
recycle the ICMP packet after copy it to PXE mode data.
Cc: Ye Ting
Cc: Wu Jiaxin
Cc: Wang Fan
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan
---
NetworkPkg/UefiPxeBcDxe/PxeBcSuppo
The IP protocol has been configured to only receive ICMP packet in PXE driver.
So this patch removes the unnecessary check for NextHeader field and replace it
with ASSERT.
Cc: Ye Ting
Cc: Wu Jiaxin
Cc: Wang Fan
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan
--
Hi, Jiaxin
In the line you are modifying the UDNI is always not started. You should move
the Nii->Id to the line after PxeStart(), not to check it here.
BestRegards
Fu Siyuan
> -Original Message-
> From: Wu, Jiaxin
> Sent: Thursday, December 21, 2017 3:13 PM
> To: edk2-devel@lists.01.or
Reviewed-by: Jiaxin Wu
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Fu,
> Siyuan
> Sent: Wednesday, December 13, 2017 10:24 AM
> To: edk2-devel@lists.01.org
> Cc: Ye, Ting ; Wang, Fan ; Wu,
> Jiaxin
> Subject: [edk2] [Patch] MdeModulePkg/
Reviewed-by: Jiaxin Wu
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Fu,
> Siyuan
> Sent: Wednesday, December 13, 2017 10:16 AM
> To: edk2-devel@lists.01.org
> Cc: Ye, Ting ; Wang, Fan ; Wu,
> Jiaxin
> Subject: [edk2] [Patch] MdeModulePkg
Reviewed-by: Ye Ting
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Fu,
Siyuan
Sent: Wednesday, December 13, 2017 10:16 AM
To: edk2-devel@lists.01.org
Cc: Ye, Ting ; Wang, Fan ; Wu, Jiaxin
Subject: [edk2] [Patch] MdeModulePkg/Ip4Dxe: Clean up
Another, please also more comments for the fields in
NV_STORE_DEFAULT_BUFFER_HEADER.
Thanks,
Star
-Original Message-
From: Zeng, Star
Sent: Thursday, December 21, 2017 3:11 PM
To: Gao, Liming ; edk2-devel@lists.01.org
Cc: Zhu, Yonghong ; Zeng, Star
Subject: RE: [Patch 00/14] Enable Str
Nii->Id is the address of the first byte of the identifying structure
for this network interface. This is only valid when the network interface
is started. When the network interface is not started, this field is set
to zero. So, we should check the value of Nii->Id before use it directly.
Cc: Wan
Liming,
I have some comments to the patch series about MdeModulePkg changes.
For MdeModulePkg: Update PCD driver to support Dynamic PcdVpdBaseAddress,
Could the if condition adjustment be removed? And how about declaring "extern
UINT32 mVpdBaseAddress;" in Service.h instead of Service.c?
For Md
In HttpBootCallback(), when data type is HttpBootHttpResponse, function may meet
the resource redirect error. In current implementation, function will still go
ahead to find header for HTTP_HEADER_CONTENT_LENGTH, this is not expected.
Function
should break in redirect status error handling.
Cc: W
Cc: Wang Fan
Cc: Ye Ting
Cc: Fu Siyuan
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wu Jiaxin
Jiaxin Wu (2):
NetworkPkg/HttpBootDxe: Avoid the potential memory leak when eror
happen.
NetworkPkg/HttpBootDxe: Break the HttpBoot Callback function when meet
re
Cc: Wang Fan
Cc: Ye Ting
Cc: Fu Siyuan
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wu Jiaxin
---
NetworkPkg/HttpBootDxe/HttpBootDhcp4.c | 3 +++
NetworkPkg/HttpBootDxe/HttpBootImpl.c | 6 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/NetworkPk
Thanks. .uni file will be updated accordingly.
Regards,
Jian
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, December 21, 2017 1:15 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Dong, Eric ; Zeng, Star
> Subject: RE: [PATCH] MdeModulePkg/MdeModulePkg.dec: Clarify usage
Cc: Ye Ting
Cc: Long Qin
Cc: Fu Siyuan
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wu Jiaxin
---
CryptoPkg/Include/Library/TlsLib.h | 6 ++
CryptoPkg/Library/TlsLib/TlsConfig.c | 8 +++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/CryptoP
Please also the *.uni file accordingly, with that, Reviewed-by: Star Zeng
Thanks,
Star
-Original Message-
From: Wang, Jian J
Sent: Thursday, December 21, 2017 1:08 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Dong, Eric
Subject: [PATCH] MdeModulePkg/MdeModulePkg.dec: Clarify usage
Cc: Star Zeng
Cc: Eric Dong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
MdeModulePkg/MdeModulePkg.dec | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 8efad5
Your requirement doesn't need any PCD knowledge.
I think all you need to do:
1. Study to know how to embedded a binary to your PE image
a). Either by converting that binary to a big C array
b). Or by creating a new resource section, including that binary
2. In your entrypoint of the wrapper
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, December 21, 2017 10:35 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Yao, Jiewen ;
> Chaganty, Rangasai V
> Subject: [PATCH] IntelSiliconPkg MicrocodeUpdateDxe: Fix (ExtendedTableLength
> &
The first 48 bytes contain the microcode update header.
DataSize must be a multiple of DWORDs.
TotalSize is always a multiple of 1024.
Both size of CPU_MICROCODE_EXTENDED_TABLE_HEADER and
CPU_MICROCODE_EXTENDED_TABLE are multiple of DWORDs.
So (ExtendedTableLength & 0x3)!=0 should be
(ExtendedTabl
AP has its own stack for code execution. If PcdCpuStackGuard is enabled,
the page at the bottom of stack of AP will be disabled (NOT PRESENT) to
monitor the stack overflow issue. This requires PcdCpuApStackSize to be
set with value more than one page of memory.
Cc: Jiewen Yao
Cc: Eric Dong
Cc: L
On 20 December 2017 at 19:28, M1cha wrote:
> From what I can see this bug dates back to the commit from 2011 where
> support for this was added: 2cf4b60895f8a
>
> The first problem is that PopulateLevel2PageTable overflows the
> translation table buffer because it doesn't verify that the size
> ac
>From what I can see this bug dates back to the commit from 2011 where
support for this was added: 2cf4b60895f8a
The first problem is that PopulateLevel2PageTable overflows the
translation table buffer because it doesn't verify that the size
actually fits within one level 2 page table.
The second
Hi Ruiyu
Thanks for the answer.
The case is similar. The only difference is that we are not allowed to use
some external code besides the UDK references and modules.
This is why we're trying to find a way to embed a binary on another one.
I did some tests here but I have a question.
Is it possi
On 19 December 2017 at 08:57, M1cha wrote:
> From what I can see this bug dates back to the commit from 2011 where
> support for this was added: 2cf4b60895f8a
>
> The first problem is that PopulateLevel2PageTable overflows the
> translation table buffer because it doesn't verify that the size
> ac
On 20 December 2017 at 15:17, gary guo wrote:
> On Wed, Dec 20, 2017 at 09:13:58AM +, Ard Biesheuvel wrote:
>> Hi Heyi,
>>
>> On 20 December 2017 at 08:21, Heyi Guo wrote:
>> > PCIe on some ARM platforms requires address translation, not only for
>> > legacy IO access, but also for 32bit memo
On 20 December 2017 at 15:17, Alexei Fedorov wrote:
> Hi Ard,
>
>
> The side effect of the following commit on 6 April:
>
>
> ArmPlatformPkg/FVP: map motherboard VRAM as uncached memory
>
> The VRAM of the PL111 on the FVP Base/Foundation models is described as
> device memory rather than uncached
Hi Ard,
The side effect of the following commit on 6 April:
ArmPlatformPkg/FVP: map motherboard VRAM as uncached memory
The VRAM of the PL111 on the FVP Base/Foundation models is described as
device memory rather than uncached memory, which is not an accurate
description of the nature of the r
On Wed, Dec 20, 2017 at 09:13:58AM +, Ard Biesheuvel wrote:
> Hi Heyi,
>
> On 20 December 2017 at 08:21, Heyi Guo wrote:
> > PCIe on some ARM platforms requires address translation, not only for
> > legacy IO access, but also for 32bit memory BAR access as well. There
> > will be "Address Tra
Same change is done for Acpi61.h.
Cc: Jiewen Yao
Cc: Liming Gao
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/IndustryStandard/Acpi60.h | 48 +++-
MdePkg/Include/IndustryStandard/Acpi61.h | 48 ++
Change BIOS Minor Version
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex
---
Platform/BroxtonPlatformPkg/BiosId.env | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/BroxtonPlatformPkg/BiosId.env
b/Platform/BroxtonPlatformPkg/BiosId.en
Reviewed-by: zwei4
Thanks,
David Wei
Intel SSG/STO/UEFI BIOS
> -Original Message-
> From: Lu, ShifeiX A
> Sent: Wednesday, December 20, 2017 5:18 PM
> To: edk2-devel@lists.01.org
> Cc: Wei, David
> Subject: [Patch][edk2-platforms/devel-MinnowBoard3-UDK
Change binaries from Common folder to Board folder.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex
---
Platform/BroxtonPlatformPkg/BuildBxtBios.sh| 56 +++---
.../Common/Tools/Stitch/IFWIStitch_Simple.bat | 36 +++---
2 files
Hi Heyi,
On 20 December 2017 at 08:21, Heyi Guo wrote:
> PCIe on some ARM platforms requires address translation, not only for
> legacy IO access, but also for 32bit memory BAR access as well. There
> will be "Address Translation Unit" or something similar in PCI host
> bridges to translation CPU
PCIe on some ARM platforms requires address translation, not only for
legacy IO access, but also for 32bit memory BAR access as well. There
will be "Address Translation Unit" or something similar in PCI host
bridges to translation CPU address to PCI address and vice versa. So
we think it may be use
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