Hi Ray,
Thanks for your suggestion. But we have committed this patch yesterday. :(
I will pay more attention to the commit message in the future work.
Thanks,
Dandan
-Original Message-
From: Ni, Ruiyu
Sent: Thursday, May 10, 2018 11:34 AM
To: Gary Lin ; Bi, Dandan
Cc: edk2-devel@lists
Dandan,
Can you describe the build failure met by Gary Lin in final commit message?
The current commit message is not very clear about which issue it may fix.
Thanks/Ray
> -Original Message-
> From: edk2-devel On Behalf Of Gary Lin
> Sent: Wednesday, May 9, 2018 4:20 PM
> To: Bi, Dandan
I don't see much needs for a PlatformAcpiLib.
Platform can call AcpiTable protocol to install ACPI table itself.
The PlatformAcpiLib adds additional program interfaces but doesn't seem to be
very helpful.
Any new program interfaces need to be carefully reviewed and only added when
necessary.
Oth
Roman,
Can you point to me the spec content which states the “Offset” instead of “Base
+ Offset” should be written to the BAR?
Does the policy apply to all PCI devices in a system, or certain PCI devices in
a system?
Thanks/Ray
From: Roman Bacik
Sent: Thursday, May 10, 2018 4:25 AM
To: edk2-de
Enable virtual keyboard on HiKey platform. It detects the pattern
in memory and GPIO pin setting, and simulates them into virtual
key.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey/HiKey.d
Do some basic initliazation on peripherals, such as pins and
regulators.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc | 2 +
Platform/Hisilicon/HiKey960/HiKey9
Enable virtual keyboard on HiKey960 platform. It checks two
conditions, such as pattern in memory and GPIO pin setting.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc
Add gpio platform driver to enable GPIO in HiKey platform.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
.../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c| 74 ++
.../Hisilicon/HiKey/HiKeyGpi
Do some basic initialization on HiKey platform, such as pin
setting, regulators and making peripherals out of reset mode.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey/HiKey.dsc
Add gpio platform driver to enable GPIO in HiKey960 platform.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc | 1 +
Platform/Hisilicon/HiKey960/HiKey960.fdf
Changelog:
v3:
* Remove ADC and boardid, since it's not really used yet.
* Add more comments.
v2:
* Split HiKeyDxe & HiKey960Dxe into smaller patches.
* Replace hardcoding register with macro.
v1:
* Enable GPIO driver.
* Enable virtual keyboard driver.
Haojian Zhuang (6):
Platform/Hi
Reviewed-by: Yonghong Zhu
Best Regards,
Zhu Yonghong
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Yonghong
Zhu
Sent: Wednesday, May 09, 2018 3:41 PM
To: edk2-devel@lists.01.org
Cc: Feng, YunhuaX ; Gao, Liming
Subject: [edk2] [Patch] BaseTo
| [...] Is it possible to tune Logo's behavior in OVMF? [...]
FYI, the HackBGRT tool exists, and may be helpful [on some bare-metal
systems, unclear about OVMF-based usefulness]. I've never used it.
https://github.com/Metabolix/HackBGRT
https://firmwaresecurity.com/2018/03/22/hackbgrt-how-to-chan
Jaben,
Instead of while TRUE, a timeout count be added so
the loop can exit if the file is not released in a
reasonable period of time. Perhaps 5 seconds.
Timeout = 0.0
while Timeout < 5.0:
try:
return os.remove(LongFilePath(path))
except:
time.sleep(0.
commit c035e37335ae43229d7e68de74a65f2c01ebc0af
Author: Zhang Lubo
Date: Thu Jan 5 14:58:05 2017 +0800
SecurityPkg: enhance secure boot Config Dxe & Time Based AuthVariable.
Added a check for sha256 being the ownly allowed signature hash.
Unfortuantely this commit assumed the form of the s
On Wed, May 09, 2018 at 04:58:52PM +, Alexei Fedorov wrote:
> Hi Leif,
>
> You wrote:
> > Yes, this fixes a bug, however I am still unable to build FVP with
> > -D ARM_FVP_RUN_NORFLASH:
> > ---
> > In file included from
> > /work/git/edk2-platforms/Platform/ARM/VExpressPkg/Library/ArmVExpressL
Hi Supreeth,
One question on this patch
We are asking permission on base-address and changing the permission of
memory based upon base and size.
I haven't looked at other part of code which manage this ,
But will there be possibility that, base address is given correctly and length
may over-l
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Supreeth Venkatesh
> Sent: Saturday, May 5, 2018 2:11 AM
> To: edk2-devel@lists.01.org
> Cc: ard.biesheu...@linaro.org; leif.lindh...@linaro.org; jiewen@intel.com;
> liming@intel.com; m
Ignore. Duplicate. Already sent out.
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Jaben Carsey
> Sent: Wednesday, May 09, 2018 1:51 PM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming
> Subject: [edk2] [PATCH v1 1/1] BaseTools: incorrect
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Supreeth Venkatesh
> Sent: Saturday, May 5, 2018 2:11 AM
> To: edk2-devel@lists.01.org
> Cc: ard.biesheu...@linaro.org; leif.lindh...@linaro.org; jiewen@intel.com;
> liming@intel.com; m
There is a common race condition when the OS fails to release a file
fast enough. this adds a retry loop.
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey
---
BaseTools/Source/Python/Common/LongFilePathOs.py | 9 +++--
1 f
Some SoCs require to use device address when BARs are programmed:
https://bugzilla.tianocore.org/show_bug.cgi?id=948
Cc: Ruiyu Ni
Cc: Vladimir Olovyannikov
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Roman Bacik
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
I will upload v2 with the corrected subject - add package name MdeModulePkg/Bus
.
*From:* Roman Bacik [mailto:roman.ba...@broadcom.com]
*Sent:* Thursday, May 3, 2018 3:55 PM
*To:* edk2-devel@lists.01.org
*Cc:* Ruiyu Ni; Vladimir Olovyannikov
*Subject:* [edk2] [PATCH] Enable using device address
Hi Leif,
You wrote:
"Yes, this fixes a bug, however I am still unable to build FVP with
-D ARM_FVP_RUN_NORFLASH:
---
In file included from
/work/git/edk2-platforms/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c:22:0:
/work/git/edk2-platforms/Platform/ARM/VExpressPkg/Include/Platform/
A couple of minor style comments.
If you don't disagree, I can fix that up before pushing and you can
have Reviewed-by: Leif Lindholm for 1,3-4.
On Wed, May 09, 2018 at 03:51:11PM +0200, Marcin Wojtas wrote:
> From: Evan Wang
>
> PCIE clock direction (input/output) has implications on comphy s
On Wed, May 09, 2018 at 03:51:09PM +0200, Marcin Wojtas wrote:
> Unification of output file name will ease handling build scripts
> (e.g. for CI purpose) when multiple board support will be added.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas
I have n
On Wed, May 02, 2018 at 05:26:42PM +0100, Alexei Fedorov wrote:
> From: Alexei Fedorov
>
> ARM Generic Interrupt Controller is incorrectly named as
> "ARM General Interrupt Controller" in ArmJuno.dsc,
> ArmVExpress-CTA15-A7.dsc and ArmVExpress-FVP-AArch64.dsc.
>
> This patch corrects the comment
Hi Alexei,
On Thu, May 03, 2018 at 10:24:21AM +0100, Alexei Fedorov wrote:
> From: Alexei Fedorov
>
> UEFI build fails for ArmVExpress-FVP-AArch64 when using
> "-D ARM_FVP_RUN_NORFLASH" build option, which prevents
> EDK2_SKIP_PEICORE macro from being defined in
> ArmVExpress-FVP-AArch64.dsc:
>
I continued to CC all people that were CC'd in Star's mail, even if I am not
sure if those are interested in this patch. If anyone doesn't want to be CC'd,
I will drop them of course.
Hey Star,
Indeed I expected it to be just for reference, however as most of the drivers
you linked share the F
Reviewed-by: Jaben Carsey
Gotta love removing code.
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Yonghong Zhu
> Sent: Wednesday, May 9, 2018 5:32 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [Patch] BaseTools: Remove the redundant
On Fri, Apr 27, 2018 at 04:24:59PM +0100, Sami Mujawar wrote:
> The ACPICA iASL compiler has been enhanced to support the
> generation of an AML hex file which is required by the
> Dynamic Tables Framework. The patch for this enhancement
> has been integrated in the ACPICA repository. Therefore
> t
On Fri, Apr 27, 2018 at 04:53:53PM +0100, Sami Mujawar wrote:
> This patchset contains the changes necessary for supporting the IORT
> specification Revision D, March 2018 update.
>
> The "MdePkg: IORT Specification Rev D updates" patch has already been
> ACKed by Ard Biesheuve and Liming Gao; how
Marvin -
My suggestion would be the same as yours: to generate a runtime error.
Tim
-Original Message-
From: edk2-devel On Behalf Of Marvin
Häuser
Sent: Wednesday, May 9, 2018 1:45 AM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Tim Lewis
Subject: Re: [edk2] [PATCH] MdePkg/BaseLib: Gl
From: Evan Wang
PCIE clock direction (input/output) has implications on comphy settings.
There are 2 PCIe clocks in CP110:
- Ref clock 0 for lanes 1,2 and 3
- Ref clock 1 for lanes 4 and 5
A proper handling of above had to be added, using newly introduced
sample at reset library class for Mar
Hi,
After long break, here's v2 of PCIE serdes fix with all review remarks
applied. 2, very small additional patches are added, which
restore proper compilation and change output file name.
More details can be found in the commit messages and the
changelog below. The code is also available in the
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile is no
longer needed due to usage of generic BDS and its
presence results in build error. Remove it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 -
From: Igal Liberman
The sample at reset library adds the following functionalities:
- MvSARGetCpuFreq - Get the CPU frequency
- MvSARGetDramFreq - Get the DRAM frequency
- MvSARGetPcieClkDirection - Determine the PCIe clock direction
for two types specified in CP110 HW block. It will be needed
Unification of output file name will ease handling build scripts
(e.g. for CI purpose) when multiple board support will be added.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 2 +-
1 file changed, 1 inse
On Wed, May 09, 2018 at 06:59:53PM +0800, Haojian Zhuang wrote:
> On 3 May 2018 at 06:49, Leif Lindholm wrote:
> > On Thu, Mar 08, 2018 at 09:30:04PM +0800, Haojian Zhuang wrote:
> >> Enable virtual keyboard on HiKey960 platform. The platform
> >> driver read pattern from memory or GPIO pin. When
the ArraySize and Array already be got in line 1093, so this code are
redundant.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/Python/AutoGen/GenC.py | 10 --
1 file changed, 10 deletions(-)
diff --git a/BaseTools/Source/Python/
Hi,
On 05/09/18 11:32, Zeng, Star wrote:
> Marvin,
>
> It is good direction to reuse more code.
> What am I concerning about are
> 1. There are comments "Sample ACPI Platform Driver" in AcpiPlatformDxe.inf
> and AcpiPlatformDxe.c, the current position of AcpiPlatformDxe seems just for
> referen
On 05/09/18 07:50, Guy Raviv wrote:
> Thanks for the detailed answer.
>
> if i choose the 2nd approach would it be possible to modify the structrue
> itself of the pci tree,
> and not only a specific device number?
> example: if i add a pci bridge between my board and a graphic card.
I can't answ
On Fri, Apr 27, 2018 at 03:58:14PM +0100, Sami Mujawar wrote:
> The iASL compiler's -tc option has been updated to generate
> output that is suitable for including from a C file. The iASL
> compiler uniquely names the C array containing the processed
> table data as _aml_code. This update can be se
On Fri, Apr 27, 2018 at 03:58:16PM +0100, Sami Mujawar wrote:
> The ACPICA iASL compiler has been enhanced to support the
> generation of an AML hex file which is required by the
> Dynamic Tables Framework. The patch for this enhancement
> has been integrated in the ACPICA repository. Therefore
> t
On 3 May 2018 at 06:49, Leif Lindholm wrote:
> On Thu, Mar 08, 2018 at 09:30:04PM +0800, Haojian Zhuang wrote:
>> Enable virtual keyboard on HiKey960 platform. The platform
>> driver read pattern from memory or GPIO pin. When the value
>> is matched, it simulates a hotkey that is used to adjust
>>
On Thu, Apr 26, 2018 at 02:01:21PM +0100, Sami Mujawar wrote:
> Acpiview is a program that allows examination of ACPI table
> contents from the UEFI Shell.
>
> Enable acpiview support as this can help with investigations,
> especially at that stage where the tables are not enabling an
> OS to boot
Hi Hao,
OK. I tried to enable auto stop command in Designware MMC driver. So this
patch could be ignored.
Thanks
Haojian
On 3 May 2018 at 10:45, Wu, Hao A wrote:
> Hi Haojian,
>
> Sorry for the delayed response.
>
> As far as I know, we enabled the auto CMD12 feature within:
> SdMmcExecTrb(), M
Do some basic initialization on HiKey platform, such as pin
setting, regulators and making peripherals out of reset mode.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey/HiKey.dsc
Enable virtual keyboard on HiKey960 platform. It checks two
conditions, such as pattern in memory and GPIO pin setting.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc
Enable virtual keyboard on HiKey platform. It detects the pattern
in memory and GPIO pin setting, and simulates them into virtual
key.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey/HiKey.d
Add gpio platform driver to enable GPIO in HiKey platform.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
.../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c| 74 ++
.../Hisilicon/HiKey/HiKeyGpi
Add gpio platform driver to enable GPIO in HiKey960 platform.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc | 1 +
Platform/Hisilicon/HiKey960/HiKey960.fdf
Do some basic initliazation on peripherals, such as pins and
regulators. Read board id of HiKey960.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dsc | 2 +
Platfor
Changelog:
v2:
* Split HiKeyDxe & HiKey960Dxe into smaller patches.
* Replace hardcoding register with macro.
v1:
* Enable GPIO driver.
* Enable virtual keyboard driver.
Haojian Zhuang (6):
Platform/Hisilicon/HiKey960: add gpio platform driver
Platform/HiKey960: initialize for board id
The PeriodicSmiDispatchFunction() in SmmPeriodicSmiLib may assert
with "Bad CR signature".
Currently, the SetActivePeriodicSmiLibraryHandler() function
(invoked at the beginning of the PeriodicSmiDispatchFunction()
function) attempts to locate the PERIODIC_SMI_LIBRARY_HANDLER_CONTEXT
structure poi
Marvin,
It is good direction to reuse more code.
What am I concerning about are
1. There are comments "Sample ACPI Platform Driver" in AcpiPlatformDxe.inf and
AcpiPlatformDxe.c, the current position of AcpiPlatformDxe seems just for
reference.
2. Almost all the platforms have their own AcpiPlatf
Hi Yonghong,
Thanks for notify about this.
I resend the patch.
Thanks,
Derek
-Original Message-
From: Zhu, Yonghong [mailto:yonghong@intel.com]
Sent: Wednesday, May 9, 2018 4:35 PM
To: Lin, Derek (HPS UEFI Dev) ; edk2-devel@lists.01.org
Cc: Zhu, Yonghong
Subject: RE: [PATCH] BaseT
When self.Alignment is None, it ran into python error since there is no
strip() in None.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Derek Lin
---
BaseTools/Source/Python/GenFds/GuidSection.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Base
The dsc nested include checking make unexpected build error when building
project A and switch to project B.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Derek Lin
---
BaseTools/Source/Python/Workspace/MetaFileParser.py | 19 +++
1 file changed, 15 inse
The order of List enumeration is arbitrary.
Need to be sorted while calculating Package/Module hash, otherwise it generate
different hash value even nothing changes.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Derek Lin
---
BaseTools/Source/Python/AutoGen/AutoGen.py |
Hi Ard,
On Mon, Apr 16, 2018 at 4:14 PM, Ard Biesheuvel
wrote:
> On 12 April 2018 at 20:47, Thomas Abraham wrote:
>> From: Vishwanatha HG
>>
>> Add the initial support for ARM's System Guidance for Infrastructure
>> (SGI) platforms. SGI-575 is the supported platform in this initial
>> implement
Changes since v2:
- addressed all the comments from Ard.
- PrePeiCore is used instead of PrePi.
Changes since v1:
- minor update to commit messages
Arm CoreLink System Guidance for Infrastructure is a collection of
resources to provide a representative view of typical compute subsystems
that can
Add initial SGI platform library support. This includes the virtual
memory map and helper functions for platform intialization.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 73 ++
.../S
From: Daniil Egranov
Add the registration of the virtio block device.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov
Signed-off-by: Thomas Abraham
---
.../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 18 -
.../ARM/SgiPkg/Drivers/PlatformDxe/Platf
From: Daniil Egranov
Add a initial platform dxe driver which starts of being almost
an empty implementation.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov
Signed-off-by: Thomas Abraham
---
.../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 25
From: Vishwanatha HG
Add the initial support for ARM's System Guidance for Infrastructure
(SGI) platforms. SGI-575 is the supported platform in this initial
implementation and can be extented to include support for upcoming
SGI platforms as well.
Contributed-under: TianoCore Contribution Agreeme
From: Daniil Egranov
Add the initial version of Acpi tables for the SGI-575 platform which
is required to boot the linux kernel up to a busybox prompt.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov
Signed-off-by: Thomas Abraham
---
.../ARM/SgiPkg/AcpiTa
From: Vishwanatha HG
Add a initial NOR flash driver platform wrapper as part of the platform
library. Access to NOR flash devices connected to CS0 and CS1 is enabled
in this initial implementation.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vishwanatha HG
Signed-off-
Hey Tim,
The compiler has no information regarding the size of the stack and hence
cannot determine an overflow.
This is basically a warning that stack of a single function is big enough to
reach past the Guard Page and ensures it will be accessed.
Yao,
I just realized there already is Stack p
Hi Derek,
Please refer below link to add Contributed-under and Signed-off-by info.
We can use BaseTools\Scripts\PatchCheck.py to check the patch format. Thanks.
https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format
Best Regards,
Zhu Yonghong
-Original Message-
Fr
Reviewed-by: Eric Dong
-Original Message-
From: Bi, Dandan
Sent: Wednesday, May 9, 2018 1:02 PM
To: edk2-devel@lists.01.org
Cc: Dong, Eric ; Gao, Liming ; Gary
Lin
Subject: [patch v2] BaseTools/VfrCompile: Avoid using uninitialized pointer
V2:
Add function _INIT_OPHDR_COND () for vari
On Wed, May 09, 2018 at 01:02:11PM +0800, Dandan Bi wrote:
> V2:
> Add function _INIT_OPHDR_COND () for variable initialization.
> Make code logic more clean.
>
> Previously _CLEAR_SAVED_OPHDR () is used for variable
> initialization, and we updated it to clean memory.
> But _CLEAR_SAVED_OPHDR ()
From: Lin, Derek (HPS UEFI Dev)
Sent: Wednesday, May 9, 2018 3:39 PM
To: Lin, Derek (HPS UEFI Dev)
Subject: [PATCH] BaseTools: Remove dsc nested include checking.
The dsc nested include checking make unexpected build error when building
project A and switch to project B.
---
BaseTools/Source/P
From: Lin, Derek (HPS UEFI Dev)
Sent: Wednesday, May 9, 2018 3:39 PM
To: Lin, Derek (HPS UEFI Dev)
Subject: [PATCH] BaseTools: Fix --hash Package and Module hash value.
The order of List enumeration is arbitrary.
Need to be sorted while calculating Package/Module hash, otherwise it generate
dif
From: Lin, Derek (HPS UEFI Dev)
Sent: Wednesday, May 9, 2018 3:39 PM
To: Lin, Derek (HPS UEFI Dev)
Subject: [PATCH] BaseTools: Fix python error with --genfds-multi-thread.
When self.Alignment is None, it ran into python error since there is no strip()
in None.
---
BaseTools/Source/Python/GenFd
From: Yunhua Feng
case example:
DSC:
[PcdsFixedAtBuild]
PcdToken.PcdName | "A"
[Components]
TestPkg/TestDriver.inf {
PcdToken.PcdName | {0x41,0x42,0x43,0x44}
}
Generating the size of array is incorrect in AutoGen.c
GLOBAL_REMOVE_IF_UNREFERENCED const UINT8
_gPcd_FixedAtBuild_PcdName[2]
76 matches
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