[edk2] [PATCH 0/2] Xhci: Handle value 5 in Port Speed field of PORTSC

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1267 Please refer to the log message of each commit for more details. Cc: Ruiyu Ni Cc: Hao Wu Cc: Jian J Wang Star Zeng (2): MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN MdeModulePkg Xhci: Handle value 5 in Port Speed fi

[edk2] [PATCH 1/2] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN

Current hard code Usb2Hc.XXXRevision may be not accurate. This patch updates code to assign Usb2Hc.XXXRevision based on SBRN (Serial Bus Release Number, PCI configuration space offset 0x60) although there is no code consuming them. Cc: Ruiyu Ni Cc: Hao Wu Cc: Jian J Wang Contributed-under: Tian

[edk2] [PATCH 2/2] MdeModulePkg Xhci: Handle value 5 in Port Speed field of PORTSC

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1267 The value 5 Port Speed field of PORTSC is new defined in XHCI 1.1 spec November 2017. This patch updates XhciDxe and XhciPei to handle it, otherwise the USB 3.1 device may not be recognized with the XHCI controller following XHCI 1.1 spec N

Re: [edk2] [PATCH edk2-platforms] Silicon/SynQuacerPciCpuIo2Dxe: fix PCIe I/O translation

On 20 October 2018 at 14:52, Leif Lindholm wrote: > Looks good functionality-wise, but is a bit of a handful to look at (and not > just because I'm code reviewing on a phone). > Could you do it with a couple of temp vars? > Yes, but then CpuIoServiceWrite would deviate from CpuIoServiceRead, so I

Re: [edk2] [staging/MicroPythonTestFramework]: MicroPython Test Framework for UEFI

Thanks Brian, Long, could you please 1) Send me the commit hashes of micropython and oniguruma that you have tested with the overrides? 2) Add a top-level Readme.md to the MicroPythonTestFramework branch, mentioning yourself as maintainer and the commit hashes of any external projects use