On 11/03/17 09:28, Ruiyu Ni wrote:
> The original code enables some BITs in PCI attributes in Start(),
> but wrongly to disable these BITs in Stop().
>
> The correct behavior is to save the original PCI attributes before
> enables some BITs in Start(), and restore to original value
> in Stop().
>
Some minor comments.
1. How about update structure field name 'OriginalAttribute' to be
'OriginalAttributes'?
2. The comments below in Stop() need to be updated accordingly.
//
// Get supported PCI attributes
//
3. Add the bugzilla link to the commit log.
With that fixed, Reviewed-by:
This patch can fix the Bug 405 issue
(https://bugzilla.tianocore.org/show_bug.cgi?id=405). Thank you!
Steven Shi
Intel\SSG\STO\UEFI Firmware
Tel: +86 021-61166522
iNet: 821-6522
> -Original Message-
> From: Ni, Ruiyu
> Sent: Tuesday, November 7, 2017 1:36 PM
> To: Laszlo Ersek
Laszlo,
Sure I will add the Bugzilla url in the commit message.
Steven,
Could you please check whether this patch can fix your "reconnect -r" hang?
Thanks/Ray
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Tuesday, November 7, 2017 7:23 AM
> To: Ni, Ruiyu
Hi Ray,
On 11/03/17 09:28, Ruiyu Ni wrote:
> The original code enables some BITs in PCI attributes in Start(),
> but wrongly to disable these BITs in Stop().
>
> The correct behavior is to save the original PCI attributes before
> enables some BITs in Start(), and restore to original value
> in
The original code enables some BITs in PCI attributes in Start(),
but wrongly to disable these BITs in Stop().
The correct behavior is to save the original PCI attributes before
enables some BITs in Start(), and restore to original value
in Stop().
Contributed-under: TianoCore Contribution
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