Ok, the commit log would be updated to reflect this change.

Thanks
Feng

-----Original Message-----
From: Zeng, Star 
Sent: Wednesday, August 19, 2015 09:19
To: Tian, Feng
Cc: edk2-devel@lists.01.org
Subject: RE: [patch] MdeModulePkg/Xhci: make all timeout values be consistent 
with comments.

In fact, the code updated the every poll delay from 1ms to 1us. Suggest to add 
this information to the commit log.

Reviewed-by: Star Zeng <star.z...@intel.com> 

-----Original Message-----
From: Tian, Feng 
Sent: Monday, August 17, 2015 2:31 PM
To: Zeng, Star
Cc: edk2-devel@lists.01.org; Tian, Feng
Subject: [patch] MdeModulePkg/Xhci: make all timeout values be consistent with 
comments.

In the original code, there exists some mismatches between the real waiting 
time and the corresponding timeout comments. For example, the 
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real code in 
fact waits 10s.

So the code is refined and XHC_POLL_DELAY macro also be removed to simplify 
code logic.

Note the changes doesn't change the original code behavior.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.t...@intel.com>
---
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h      | 15 +++++----------
 MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c   | 16 ++++++++--------
 MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c |  2 +-
 MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c   | 12 ++++++------
 MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h   | 17 ++++++++---------
 5 files changed, 28 insertions(+), 34 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h 
b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 9927f79..7999151 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -2,7 +2,7 @@
 
   Provides some data structure definitions used by the XHCI host controller 
driver.
 
-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at
@@ -47,24 +47,19 @@ typedef struct _USB_DEV_CONTEXT      USB_DEV_CONTEXT;
 //
 #define XHC_1_MICROSECOND            (1)
 //
-// Convert millisecond to microsecond.
+// The unit is microsecond, setting it as 1ms.
 //
 #define XHC_1_MILLISECOND            (1000)
 //
 // XHC generic timeout experience values.
-// The unit is microsecond, setting it as 10ms.
+// The unit is millisecond, setting it as 10s.
 //
 #define XHC_GENERIC_TIMEOUT          (10 * 1000)
 //
 // XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
 //
-#define XHC_RESET_TIMEOUT            (1000 * 1000)
-//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY               (1000)
+#define XHC_RESET_TIMEOUT            (1000)
 //
 // XHC async transfer timer interval, set by experience.
 // The unit is 100us, takes 1ms as interval.
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c 
b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index a513dd9..d0f2205 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -2,7 +2,7 @@
 
   The XHCI register operation routines.
 
-Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at @@ -499,7 +499,7 @@ 
XhcClearOpRegBit (
   @param  Offset       The offset of the operation register.
   @param  Bit          The bit of the register to wait for.
   @param  WaitToSet    Wait the bit to set or clear.
-  @param  Timeout      The time to wait before abort (in microsecond, us).
+  @param  Timeout      The time to wait before abort (in millisecond, ms).
 
   @retval EFI_SUCCESS  The bit successfully changed by host controller.
   @retval EFI_TIMEOUT  The time out occurred.
@@ -515,16 +515,16 @@ XhcWaitOpRegBit (
   )
 {
   UINT32                  Index;
-  UINTN                   Loop;
+  UINT64                  Loop;
 
-  Loop   = (Timeout / XHC_POLL_DELAY) + 1;
+  Loop   = Timeout * XHC_1_MILLISECOND;
 
   for (Index = 0; Index < Loop; Index++) {
     if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
       return EFI_SUCCESS;
     }
 
-    gBS->Stall (XHC_POLL_DELAY);
+    gBS->Stall (XHC_1_MICROSECOND);
   }
 
   return EFI_TIMEOUT;
@@ -656,7 +656,7 @@ XhcIsSysError (
   Reset the XHCI host controller.
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in microsecond, us).
+  @param  Timeout      Time to wait before abort (in millisecond, ms).
 
   @retval EFI_SUCCESS  The XHCI host controller is reset.
   @return Others       Failed to reset the XHCI before Timeout.
@@ -698,7 +698,7 @@ XhcResetHC (
   Halt the XHCI host controller.
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in microsecond, us).
+  @param  Timeout      Time to wait before abort (in millisecond, ms).
 
   @return EFI_SUCCESS  The XHCI host controller is halt.
   @return EFI_TIMEOUT  Failed to halt the XHCI before Timeout.
@@ -722,7 +722,7 @@ XhcHaltHC (
   Set the XHCI host controller to run.
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in microsecond, us).
+  @param  Timeout      Time to wait before abort (in millisecond, ms).
 
   @return EFI_SUCCESS  The XHCI host controller is running.
   @return EFI_TIMEOUT  Failed to set the XHCI to run before Timeout.
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c 
b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 1bdf1a4..05cd616 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -1215,7 +1215,7 @@ XhcExecTransfer (
 {
   EFI_STATUS              Status;
   UINTN                   Index;
-  UINTN                   Loop;
+  UINT64                  Loop;
   UINT8                   SlotId;
   UINT8                   Dci;
   BOOLEAN                 Finished;
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c 
b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
index 72e86ca..2f16b82 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
@@ -2,7 +2,7 @@
 PEIM to produce gPeiUsb2HostControllerPpiGuid based on 
gPeiUsbControllerPpiGuid  which is used to enable recovery function from USB 
Drivers.
 
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions @@ -161,7 +161,7 @@ XhcPeiClearOpRegBit (
   @param  Offset        The offset of the operational register.
   @param  Bit           The bit mask of the register to wait for.
   @param  WaitToSet     Wait the bit to set or clear.
-  @param  Timeout       The time to wait before abort (in microsecond, us).
+  @param  Timeout       The time to wait before abort (in millisecond, ms).
 
   @retval EFI_SUCCESS   The bit successfully changed by host controller.
   @retval EFI_TIMEOUT   The time out occurred.
@@ -176,14 +176,14 @@ XhcPeiWaitOpRegBit (
   IN UINT32             Timeout
   )
 {
-  UINT32                Index;
+  UINT64                Index;
 
-  for (Index = 0; Index < Timeout / XHC_POLL_DELAY + 1; Index++) {
+  for (Index = 0; Index < Timeout * XHC_1_MILLISECOND; Index++) {
     if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
       return EFI_SUCCESS;
     }
 
-    MicroSecondDelay (XHC_POLL_DELAY);
+    MicroSecondDelay (XHC_1_MICROSECOND);
   }
 
   return EFI_TIMEOUT;
@@ -381,7 +381,7 @@ XhcPeiIsSysError (
   Reset the host controller.
 
   @param  Xhc           The XHCI device.
-  @param  Timeout       Time to wait before abort (in microsecond, us).
+  @param  Timeout       Time to wait before abort (in millisecond, ms).
 
   @retval EFI_TIMEOUT   The transfer failed due to time out.
   @retval Others        Failed to reset the host.
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h 
b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
index 3b77f2a..ccf4dc2 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
@@ -1,7 +1,7 @@
 /** @file
 Private Header file for Usb Host Controller PEIM
 
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions @@ -48,21 +48,20 @@ typedef struct 
_USB_DEV_CONTEXT USB_DEV_CONTEXT;
 
 //
 // XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
 //
-#define XHC_RESET_TIMEOUT           (1 * XHC_1_SECOND)
-//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY              (1 * XHC_1_MILLISECOND)
+#define XHC_RESET_TIMEOUT           (1000)
 
 //
 // Wait for root port state stable.
 //
 #define XHC_ROOT_PORT_STATE_STABLE  (200 * XHC_1_MILLISECOND)
 
-#define XHC_GENERIC_TIMEOUT         (10 * XHC_1_MILLISECOND)
+//
+// XHC generic timeout experience values.
+// The unit is millisecond, setting it as 10s.
+//
+#define XHC_GENERIC_TIMEOUT         (10 * 1000)
 
 #define XHC_LOW_32BIT(Addr64)       ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
 #define XHC_HIGH_32BIT(Addr64)      ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 
0XFFFFFFFF))
--
1.9.5.msysgit.0

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