Re: [edk2] [platforms: PATCH v2 09/10] Marvell/Drivers: XenonDxe: Allow overriding base clock frequency

2017-10-27 Thread Marcin Wojtas
2017-10-27 16:51 GMT+02:00 Leif Lindholm : > On Fri, Oct 27, 2017 at 03:13:51AM +0200, Marcin Wojtas wrote: >> Some SdMmc host controllers are run by clocks with different >> frequency than it is reflected in Capabilities Register 1. >> Because the bitfield is only 8 bits

Re: [edk2] [platforms: PATCH v2 09/10] Marvell/Drivers: XenonDxe: Allow overriding base clock frequency

2017-10-27 Thread Leif Lindholm
On Fri, Oct 27, 2017 at 03:13:51AM +0200, Marcin Wojtas wrote: > Some SdMmc host controllers are run by clocks with different > frequency than it is reflected in Capabilities Register 1. > Because the bitfield is only 8 bits wide, a maximum value > that could be obtained from hardware is 255(MHz).

[edk2] [platforms: PATCH v2 09/10] Marvell/Drivers: XenonDxe: Allow overriding base clock frequency

2017-10-26 Thread Marcin Wojtas
Some SdMmc host controllers are run by clocks with different frequency than it is reflected in Capabilities Register 1. Because the bitfield is only 8 bits wide, a maximum value that could be obtained from hardware is 255(MHz). In case the actual frequency exceeds 255MHz, the 8-bit BaseClkFreq