Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Application/UiApp/FrontPageCustomizedUiSupport.c | 9 ++---
.../BootMaintenanceManagerCustomizedUiSupport.c |
ffer", heap memory overflow occurs during copy.
One solution is to allocate pool first then copy the necessary bytes to new
memory. Another is using ReallocatePool instead if old buffer will be freed
on spot.
Jian J Wang (3):
MdeModulePkg: Fix misuses of AllocateCopyPo
f old buffer will be freed
on spot.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Bi Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@in
ld "Buffer" to new allocated one. If "AllocationSize" is bigger
than size of "Buffer", heap memory overflow occurs during copy.
One solution is to allocate pool first then copy the necessary bytes to new
memory. Another is using ReallocatePool instead if old buffer wi
Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Universal/BdsDxe/DeviceMngr/DeviceManager.c| 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
a/
t;
Cc: Ruiyu Ni <ruiyu...@intel.com>
Cc: Bi Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
ShellPkg/Application/Shell/Shell.c | 4 +++-
ShellPkg/Library/UefiS
ore detailed information, please refer to
https://bugzilla.tianocore.org/show_bug.cgi?id=753
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wa
ore detailed information, please refer to
https://bugzilla.tianocore.org/show_bug.cgi?id=753
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wa
Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Jiewen Yao <jiewen@intel.com>
Regression-tested-by: Laszlo Ersek &
ution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Jiewen Yao <jiewen@intel.com>
Regression-tested-by: Laszlo Ersek <ler...@redhat.com>
---
MdeModulePkg/MdeModulePkg.dec | 60 +++
ler...@redhat.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Jiewen Yao <jiewen@intel.com>
ulation platform which doesn't
support paging.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contrib
gt;
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Jiewen Yao <jiewen@intel.com>
Regression-tested-by: L
the fact that it doesn't support paging which is needed for
this feature to work. But all are validated with feature is disabled.
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.
s;
};
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off
om>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Jiewen Yao <jiewen@intel.com>
Regression-tested-by: L
ch
as possible.
More detailed information, please refer to
https://bugzilla.tianocore.org/show_bug.cgi?id=753
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
S
://bugzilla.tianocore.org/show_bug.cgi?id=753
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <
rst then copy the necessary bytes to new
memory. This can avoid copying extra bytes from unknown memory range.
Jian J Wang (3):
MdeModulePkg: Fix misuses of AllocateCopyPool
ShellPkg: Fix misuses of AllocateCopyPool
IntelFrameworkModulePkg: Fix misuses of AllocateCopyPool
.../Uni
rst then copy the necessary bytes to new
memory. This can avoid copying extra bytes from unknown memory range.
Cc: Jaben Carsey <jaben.car...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Cc: Bi Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agree
rst then copy the necessary bytes to new
memory. This can avoid copying extra bytes from unknown memory range.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Bi Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agree
rst then copy the necessary bytes to new
memory. This can avoid copying extra bytes from unknown memory range.
Cc: Liming Gao <liming@intel.com>
Cc: Bi Dandan <dandan...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@i
@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.c | 17 +-
UefiCpuPkg/CpuDxe/CpuDxe.h
ePages;
} PAGE_TABLE_POOL_HEADER;
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.co
wen Yao <jiewen@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/
Eric Dong <eric.d...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/MdeModulePkg.dec | 28
1 file changed, 28 inse
of the pages used as page table.
Validation works include booting Windows (10/server 2016) and Linux
(Fedora/Ubuntu)
on OVMF and Intel real platform.
Jian J Wang (4):
MdeModulePkg/MdeModulePkg.dec: Add new PCDs and Guid
MdeModulePkg/PageTablePool.h: Page table pool GUID definition file
Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c | 118 ++---
.../Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf | 1 -
2 files changed, 10 insertions(+), 109 deletions(-)
diff --git a/IntelFrameworkModul
ethods to do the same job, which also makes code more
readability.
Cc: Liming Gao <liming@intel.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w
ODE macro):
ACCESS_PAGE0_CODE(
);
Cc: Liming Gao <liming@intel.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com&g
newly added PcdNullPointerDetectionPropertyMask caused backward
compatibility issue in some packages having legcy drivers. Since the
attributes missing issue in GCD services has been fixed, it's now able to
eliminate the dependency on this PCD.
Jian J Wang (3):
IntelFrameworkPkg/LegacyBios.h: Add a macro to guar
ao <jiewen@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Cor
location
> and protection easier and error free.
Write Protect feature (CR0.WP) is always enabled in driver UefiCpuPkg/CpuDxe.
But the memory pages used for page table are not set as read-only in the driver
DxeIplPeim, after the paging is setup. This might jeopardize the page t
page should be turned into a new
Guard page.
Cc: Jie Lin <jie@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/
page should be turned into a new
Guard page.
Since the most part code of Heap Guard feature are almost the same,
PiSmmCore and DxeCore have both above issues. This patch series fix them all.
Jian J Wang (2):
MdeModulePkg/DxeCore: Fix issues in Heap Guard
MdeModulePkg/PiSmmCore: Fix issues in Heap
page should be turned into a new
Guard page.
Cc: Jie Lin <jie@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Co
job, which also makes code more
readability.
Cc: Liming Gao <liming@intel.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Csm/LegacyB
able to
eliminate the dependency on this PCD.
Jian J Wang (3):
IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access
IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable
page 0
IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page
0
job, which also makes code more
readability.
Cc: Liming Gao <liming@intel.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Csm/BiosThunk/Keyboard
gt;
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +
1 file changed, 34 inserti
t;
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../CpuExceptionHandlerLib/CpuExceptionCommon.h| 39 ++
.../
eption dump
message won't be printed out when there's a stack overflow happened.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-b
@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdePkg/Include/Library/BaseLib.h | 117 +++
MdePkg/Library/BaseLib/B
;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 ++-
MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c | 4 ++
MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c | 1
en@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 +
UefiCpuPkg/CpuD
Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModu
Laszlo Ersek <ler...@redhat.com>
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c
r.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Include/Lib
>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../CpuExcept
e sure exception handler works normally even when the stack
is corrupted, stack switching is implemented in exception library.
Due to the mechanism behind Stack Guard, this feature is only avaiable for
UEFI drivers (memory avaiable). That also means it doesn't support NT32
emulated platform (
euvel <ard.biesheu...@linaro.org>
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@li
ution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/UefiCpuPkg.dec | 12
1 file changed, 12 insertions(+)
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index d2965ba14c..83eb6eed40 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b
The purpose of the patch is just to avoid complaining from compiler and
static check tool.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Wu Hao <hao.a...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpu
effect, it will prevent EDK2 from reporting multple RT_CODE to OS.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.
. That also means it doesn't support NT32 emulated platform.
Validation works include:
a. OVMF emulated platform: boot to shell (IA32/X64)
b. Intel real platform: boot to shell (IA32/X64)
Jian J Wang (3):
MdeModulePkg/metafile: Add PCD PcdCpuStackGuard
MdeModulePkg/DxeIpl: Enable paging
n@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../CpuExceptionHand
and memory access cross into the last page
of it, #PF exception will be triggered.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-o
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/MdeModulePkg.dec |
Cc: Laszlo Ersek
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
UefiCpuPkg/CpuDxe/CpuDxe.c | 2 +-
UefiCpuPkg/CpuDxe/CpuDxe.inf | 1 +
UefiCpuPkg/CpuDxe/CpuPageTable.c | 108
Zeng
Cc: Eric Dong
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
MdeModulePkg/Core/Dxe/Mem/HeapGuard.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Mem/HeapGuard.c
b/MdeModulePkg/Core
in a global
variable and use it to access DXE page table if in SMM mode.
Jian J Wang (2):
UefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode
MdeModulePkg/Core: remove SMM check for Heap Guard feature detection
MdeModulePkg/Core/Dxe/Mem/HeapGuard.c | 10
UefiCpuPkg/CpuDxe
use it to access DXE page table if in SMM mode.
Jian J Wang (2):
UefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode
MdeModulePkg/Core: remove SMM check for Heap Guard feature detection
MdeModulePkg/Core/Dxe/Mem/HeapGuard.c | 10 ---
UefiCpuPkg/CpuDxe/CpuDxe.inf | 1
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
MdeModulePkg/Core/Dxe/Mem/HeapGuard.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Mem/HeapGuard.c
b/MdeModulePkg/Core/Dxe/Mem/HeapGuard.c
index 9d765c98f6..447c56bb11
paging attributes and changing
SMM page table attributes unexpectedly.
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
UefiCpuPkg/CpuDxe/CpuDxe.inf | 1 +
UefiCpuPkg/CpuDxe/Cp
gt;
Cc: Jiewen Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 5 +++--
1 file changed, 3 insertions(
Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/PiSmmCore/HeapGuard.c | 1467 +
MdeModulePkg/Core/PiSmmCore/HeapGuard.h | 398 ++
ulation platform which doesn't
support paging.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contrib
ution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/MdeModulePkg.dec | 60 +++
MdeModulePkg/MdeModulePkg.uni | 58 +
2 files changed, 118 insertions(+)
diff --git a/MdeModul
m>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Include/Protocol/SmmMemoryAttribute.h | 136 +
ure cannot work.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1
for
this feature to work. But all are validated with feature is disabled.
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Jian J Wang (7):
MdeModulePkg/MdeModulePkg.dec,.uni: Add
Yao <jiewen@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 1 +
MdeModulePkg/Core/DxeI
yellet Wolman <ayellet.wol...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
Jian J Wang (6):
MdeModulePkg/DxeCore: Implement heap guard feature for
el.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core
sted-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 7 +
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 20 +++
UefiCpuP
el.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <j
.@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/MdeModulePkg.dec | 60 +++
MdeModulePkg/MdeModulePkg.uni | 58 +
2 files
com>
Suggested-by: Ayellet Wolman <ayellet.wol...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a
t 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index d312eb66f8..0802464b9d 100644
--- a
Cc: Dandan Bi <dandan...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/UefiCpuPkg.uni | 16
Cc: Dandan Bi <dandan...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdePkg/Includ
This patch series are meant for cleaning up code according to coding style
requirements.
Jian J Wang (4):
MdePkg/BaseLib.h: Coding style clean-up
MdeModulePkg/Core: Coding style clean-up
UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
UefiCpuPkg: Update code to use
Cc: Dandan Bi <dandan...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5
tion Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Ia32/ArchExceptionHandler.c| 24 +++---
.../X64/ArchExceptionHandler.c | 6 +++---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +-
3 files chang
;
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdePkg/Library/BasePrintLib/PrintLibInternal.c | 5 -
1 file changed, 4 insertions
guard page cannot be guaranteed.
Cc: Star Zeng <star.z...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/
ao <jiewen@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 +
x cpu0's ApTopOfStack initialization.
> c. Fix wrong debug print format.
The reason is that DXE part initialization will reuse the stack allocated
at PEI phase, if MP was initialized before. Some code added to check this
situation and use stack base address saved in HOB passed from PEI.
Jian J Wang (2)
k
is not used for BSP, it's should be fixed in case of misunderstanding and
future possible code changes.
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Sign
Cc: Dandan Bi <dandan...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 2 +-
1 f
yu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 4
1 file changed, 4 insertions(+)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index a9c9b
in CpuDxe driver
but let AP do it in its own wakeup code. There's no need to flush TLB
for AP who has no chance to run code.
Jian J Wang (2):
UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode
UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs
UefiCpuPkg/CpuDxe
c: Eric Dong <eric.d...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
<ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 85 +++-
1 file changed, 5 insertions(+), 80 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuP
c: Star Zeng <star.z...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
MdeModulePkg/Core/Dxe/Mem/HeapGuard.c | 15 +
MdeModulePkg/Core/Dxe/Mem/Page.c | 40 ++-
MdeModul
ibuted-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index a9c9bc9d5e..b97a444c09 100644
--- a
NX memory protection feature enabled by PcdDxeNxMemoryProtectionPolicy
was not fully tested, especially if it's enabled for memory with type
of EfiBootServicesCode, EfiConventionalMemory and EfiReservedMemoryType.
This series will fix all issues caused by it.
Jian J Wang (6):
UefiCpuPkg
attribute for
those memory.
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@i
.d...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
.../Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf | 1 +
.../Universal/Acpi/BootScriptExec
Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.w...@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuP
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