happened in this
group. I'll repost this just in case some of you didn't get the last one.
This is a question regarding systems which use CompactPCI bus architecture.
On a cPCI backplane the PCI clock is routed to every slot on the backplane
with up to 7 peripheral slots possible on a normal
happened in this
group. I'll repost this just in case some of you didn't get the last one.
This is a question regarding systems which use CompactPCI bus architecture.
On a cPCI backplane the PCI clock is routed to every slot on the backplane
with up to 7 peripheral slots possible on a normal
: compactPCI bus
Chrg: $0.00 Imp: Norm Sens: StdReceipt: NoParts: 1
From: Fleury, Bill bi...@artesyncp.com
Subject: RE: compactPCI bus
List-Post: emc-pstc@listserv.ieee.org
Date: Tue, 19 Sep 2000 12:44:11 -0500
Thanks Cortland,
I was thinking that I was going to have to somehow
. I'll repost this just in case some of you didn't get the last one.
This is a question regarding systems which use CompactPCI bus architecture.
On a cPCI backplane the PCI clock is routed to every slot on the backplane
with up to 7 peripheral slots possible on a normal backplane. My question
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